[llvm] r199628 - [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.

[Chandler Carruth]

Kevin, this caused every bot to fail. It trivially fails 'make check' or
any variant thereof.

Please check stuff before committing. Also, you can check on IRC to see if
build bots hit this. It's been about 45 minutes without an update or a fix,
so I'm going to revert until you can clean it up.


On Sun, Jan 19, 2014 at 11:32 PM, Kevin Qin <Kevin.Qin at arm.com> wrote:

> Author: kevinqin
> Date: Mon Jan 20 01:32:26 2014
> New Revision: 199628
>
> URL: http://llvm.org/viewvc/llvm-project?rev=199628&view=rev
> Log:
> [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.
>
> Modified:
>     llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
>     llvm/trunk/test/CodeGen/AArch64/neon-extract.ll
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=199628&r1=199627&r2=199628&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Jan 20
> 01:32:26 2014
> @@ -4654,22 +4654,28 @@ AArch64TargetLowering::LowerVECTOR_SHUFF
>    // it into NEON_VEXTRACT.
>    if (V1EltNum == Length) {
>      // Check if the shuffle mask is sequential.
> -    bool IsSequential = true;
> -    int CurMask = ShuffleMask[0];
> -    for (int I = 0; I < Length; ++I) {
> -      if (ShuffleMask[I] != CurMask) {
> -        IsSequential = false;
> -        break;
> -      }
> -      CurMask++;
> +    int SkipUndef = 0;
> +    while (ShuffleMask[SkipUndef] == -1) {
> +      SkipUndef++;
>      }
> -    if (IsSequential) {
> -      assert((EltSize % 8 == 0) && "Bitsize of vector element is
> incorrect");
> -      unsigned VecSize = EltSize * V1EltNum;
> -      unsigned Index = (EltSize/8) * ShuffleMask[0];
> -      if (VecSize == 64 || VecSize == 128)
> -        return DAG.getNode(AArch64ISD::NEON_VEXTRACT, dl, VT, V1, V2,
> -                           DAG.getConstant(Index, MVT::i64));
> +    int CurMask = ShuffleMask[SkipUndef];
> +    if (CurMask >= SkipUndef) {
> +      bool IsSequential = true;
> +      for (int I = SkipUndef; I < Length; ++I) {
> +        if (ShuffleMask[I] != -1 && ShuffleMask[I] != CurMask) {
> +          IsSequential = false;
> +          break;
> +        }
> +        CurMask++;
> +      }
> +      if (IsSequential) {
> +        assert((EltSize % 8 == 0) && "Bitsize of vector element is
> incorrect");
> +        unsigned VecSize = EltSize * V1EltNum;
> +        unsigned Index = (EltSize / 8) * (ShuffleMask[SkipUndef] -
> SkipUndef);
> +        if (VecSize == 64 || VecSize == 128)
> +          return DAG.getNode(AArch64ISD::NEON_VEXTRACT, dl, VT, V1, V2,
> +                             DAG.getConstant(Index, MVT::i64));
> +      }
>      }
>    }
>
>
> Modified: llvm/trunk/test/CodeGen/AArch64/neon-extract.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/neon-extract.ll?rev=199628&r1=199627&r2=199628&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/neon-extract.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/neon-extract.ll Mon Jan 20 01:32:26
> 2014
> @@ -188,3 +188,35 @@ entry:
>    %vext = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 3, i32
> 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>
>    ret <8 x i16> %vext
>  }
> +
> +define <8 x i8> @test_undef_vext_s8(<8 x i8> %a) {
> +; CHECK: test_undef_vext_s8:
> +; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x2
> +entry:
> +  %vext = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 10,
> i32 10, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
> +  ret <8 x i8> %vext
> +}
> +
> +define <16 x i8> @test_undef_vextq_s8(<16 x i8> %a) {
> +; CHECK: test_undef_vextq_s8:
> +; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x6
> +entry:
> +  %vext = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32
> 20, i32 20, i32 20, i32 20, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15,
> i32 16, i32 20, i32 20, i32 20, i32 20, i32 20>
> +  ret <16 x i8> %vext
> +}
> +
> +define <4 x i16> @test_undef_vext_s16(<4 x i16> %a) {
> +; CHECK: test_undef_vext_s16:
> +; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x2
> +entry:
> +  %vext = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 4,
> i32 2, i32 3, i32 4>
> +  ret <4 x i16> %vext
> +}
> +
> +define <8 x i16> @test_undef_vextq_s16(<8 x i16> %a) {
> +; CHECK: test_undef_vextq_s16:
> +; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x6
> +entry:
> +  %vext = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 10,
> i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>
> +  ret <8 x i16> %vext
> +}
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140120/1e5b4cd3/attachment.html>