[PATCH] R600/SI: Comparisons set vcc / scc
Matt Arsenault
arsenm2 at gmail.com
Fri Jan 17 09:44:05 PST 2014
Ping
On Dec 20, 2013, at 1:04 PM, Matt Arsenault <arsenm2 at gmail.com> wrote:
>
> On Dec 13, 2013, at 9:47 PM, Tom Stellard <tom at stellard.net> wrote:
>
>> On Fri, Dec 13, 2013 at 06:33:33PM -0800, Matt Arsenault wrote:
>>> On 12/13/2013 06:29 PM, Tom Stellard wrote:
>>>> On Wed, Dec 11, 2013 at 08:17:47PM -0800, Matt Arsenault wrote:
>>>>> Move VCC defs to VOPC_32
>>>>>
>>>>> http://llvm-reviews.chandlerc.com/D2377
>>>>>
>>>>> CHANGE SINCE LAST DIFF
>>>>> http://llvm-reviews.chandlerc.com/D2377?vs=6014&id=6046#toc
>>>>>
>>>>> Files:
>>>>> lib/Target/R600/SIInstrInfo.td
>>>>> lib/Target/R600/SIInstructions.td
>>>>>
>>>>> Index: lib/Target/R600/SIInstrInfo.td
>>>>> ===================================================================
>>>>> --- lib/Target/R600/SIInstrInfo.td
>>>>> +++ lib/Target/R600/SIInstrInfo.td
>>>>> @@ -319,7 +319,9 @@
>>>>> def _e32 : VOPC <
>>>>> op, (ins arc:$src0, vrc:$src1),
>>>>> opName#"_e32 $dst, $src0, $src1", []
>>>>> - >, VOP <opName>;
>>>>> + >, VOP <opName> {
>>>>> + let Defs = [VCC];
>>>>> + }
>>>>>
>>>>> def _e64 : VOP3 <
>>>>> {0, op{7}, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
>>>>> Index: lib/Target/R600/SIInstructions.td
>>>>> ===================================================================
>>>>> --- lib/Target/R600/SIInstructions.td
>>>>> +++ lib/Target/R600/SIInstructions.td
>>>>> @@ -114,7 +114,7 @@
>>>>>> ;
>>>>> */
>>>>>
>>>>> -let isCompare = 1 in {
>>>>> +let isCompare = 1, Defs = [SCC] in {
>>>>> def S_CMPK_LG_I32 : SOPK_32 <0x00000004, "S_CMPK_LG_I32", []>;
>>>>> def S_CMPK_GT_I32 : SOPK_32 <0x00000005, "S_CMPK_GT_I32", []>;
>>>>> def S_CMPK_GE_I32 : SOPK_32 <0x00000006, "S_CMPK_GE_I32", []>;
>>>>> @@ -126,7 +126,7 @@
>>>>> def S_CMPK_GE_U32 : SOPK_32 <0x0000000c, "S_CMPK_GE_U32", []>;
>>>>> def S_CMPK_LT_U32 : SOPK_32 <0x0000000d, "S_CMPK_LT_U32", []>;
>>>>> def S_CMPK_LE_U32 : SOPK_32 <0x0000000e, "S_CMPK_LE_U32", []>;
>>>>> -} // End isCompare = 1
>>>>> +} // End isCompare = 1, Defs = [SCC]
>>>>>
>>>>> let Defs = [SCC], isCommutable = 1 in {
>>>>> def S_ADDK_I32 : SOPK_32 <0x0000000f, "S_ADDK_I32", []>;
>>>>> @@ -159,7 +159,7 @@
>>>>> defm V_CMP_NLT_F32 : VOPC_32 <0x0000000e, "V_CMP_NLT_F32">;
>>>>> defm V_CMP_TRU_F32 : VOPC_32 <0x0000000f, "V_CMP_TRU_F32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>> I think you forgot to remove the VCC defs in a few places.
>>>>
>>>> -Tom
>>> No, the places that also set EXEC need to specify VCC also. Otherwise
>>> you overwrite Defs with just [EXEC], it isn't appended.
>>
>> OK, then I think we'll have to move the EXEC and VCC defs into the
>> VOPC_32 multiclass.
>>
>> -Tom
>>
>
> Do you mean assume VOPC instructions set EXEC and then specify sets just VCC on the ones that don’t? That seems more confusing. Or do you mean a subclass of VOPC for instructions that set both?
>
>>>>
>>>>>
>>>>> defm V_CMPX_F_F32 : VOPC_32 <0x00000010, "V_CMPX_F_F32">;
>>>>> defm V_CMPX_LT_F32 : VOPC_32 <0x00000011, "V_CMPX_LT_F32">;
>>>>> @@ -178,7 +178,7 @@
>>>>> defm V_CMPX_NLT_F32 : VOPC_32 <0x0000001e, "V_CMPX_NLT_F32">;
>>>>> defm V_CMPX_TRU_F32 : VOPC_32 <0x0000001f, "V_CMPX_TRU_F32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_F_F64 : VOPC_64 <0x00000020, "V_CMP_F_F64">;
>>>>> defm V_CMP_LT_F64 : VOPC_64 <0x00000021, "V_CMP_LT_F64", f64, COND_OLT>;
>>>>> @@ -235,7 +235,7 @@
>>>>> defm V_CMPS_NLT_F32 : VOPC_32 <0x0000004e, "V_CMPS_NLT_F32">;
>>>>> defm V_CMPS_TRU_F32 : VOPC_32 <0x0000004f, "V_CMPS_TRU_F32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>>
>>>>> defm V_CMPSX_F_F32 : VOPC_32 <0x00000050, "V_CMPSX_F_F32">;
>>>>> defm V_CMPSX_LT_F32 : VOPC_32 <0x00000051, "V_CMPSX_LT_F32">;
>>>>> @@ -254,7 +254,7 @@
>>>>> defm V_CMPSX_NLT_F32 : VOPC_32 <0x0000005e, "V_CMPSX_NLT_F32">;
>>>>> defm V_CMPSX_TRU_F32 : VOPC_32 <0x0000005f, "V_CMPSX_TRU_F32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMPS_F_F64 : VOPC_64 <0x00000060, "V_CMPS_F_F64">;
>>>>> defm V_CMPS_LT_F64 : VOPC_64 <0x00000061, "V_CMPS_LT_F64">;
>>>>> @@ -303,7 +303,7 @@
>>>>> defm V_CMP_GE_I32 : VOPC_32 <0x00000086, "V_CMP_GE_I32", i32, COND_SGE>;
>>>>> defm V_CMP_T_I32 : VOPC_32 <0x00000087, "V_CMP_T_I32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>>
>>>>> defm V_CMPX_F_I32 : VOPC_32 <0x00000090, "V_CMPX_F_I32">;
>>>>> defm V_CMPX_LT_I32 : VOPC_32 <0x00000091, "V_CMPX_LT_I32">;
>>>>> @@ -314,7 +314,7 @@
>>>>> defm V_CMPX_GE_I32 : VOPC_32 <0x00000096, "V_CMPX_GE_I32">;
>>>>> defm V_CMPX_T_I32 : VOPC_32 <0x00000097, "V_CMPX_T_I32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_F_I64 : VOPC_64 <0x000000a0, "V_CMP_F_I64">;
>>>>> defm V_CMP_LT_I64 : VOPC_64 <0x000000a1, "V_CMP_LT_I64", i64, COND_SLT>;
>>>>> @@ -347,7 +347,7 @@
>>>>> defm V_CMP_GE_U32 : VOPC_32 <0x000000c6, "V_CMP_GE_U32", i32, COND_UGE>;
>>>>> defm V_CMP_T_U32 : VOPC_32 <0x000000c7, "V_CMP_T_U32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>>
>>>>> defm V_CMPX_F_U32 : VOPC_32 <0x000000d0, "V_CMPX_F_U32">;
>>>>> defm V_CMPX_LT_U32 : VOPC_32 <0x000000d1, "V_CMPX_LT_U32">;
>>>>> @@ -358,7 +358,7 @@
>>>>> defm V_CMPX_GE_U32 : VOPC_32 <0x000000d6, "V_CMPX_GE_U32">;
>>>>> defm V_CMPX_T_U32 : VOPC_32 <0x000000d7, "V_CMPX_T_U32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_F_U64 : VOPC_64 <0x000000e0, "V_CMP_F_U64">;
>>>>> defm V_CMP_LT_U64 : VOPC_64 <0x000000e1, "V_CMP_LT_U64", i64, COND_ULT>;
>>>>> @@ -384,9 +384,9 @@
>>>>>
>>>>> defm V_CMP_CLASS_F32 : VOPC_32 <0x00000088, "V_CMP_CLASS_F32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>> defm V_CMPX_CLASS_F32 : VOPC_32 <0x00000098, "V_CMPX_CLASS_F32">;
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_CLASS_F64 : VOPC_64 <0x000000a8, "V_CMP_CLASS_F64">;
>>>>> Index: lib/Target/R600/SIInstrInfo.td
>>>>> ===================================================================
>>>>> --- lib/Target/R600/SIInstrInfo.td
>>>>> +++ lib/Target/R600/SIInstrInfo.td
>>>>> @@ -319,7 +319,9 @@
>>>>> def _e32 : VOPC <
>>>>> op, (ins arc:$src0, vrc:$src1),
>>>>> opName#"_e32 $dst, $src0, $src1", []
>>>>> - >, VOP <opName>;
>>>>> + >, VOP <opName> {
>>>>> + let Defs = [VCC];
>>>>> + }
>>>>>
>>>>> def _e64 : VOP3 <
>>>>> {0, op{7}, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
>>>>> Index: lib/Target/R600/SIInstructions.td
>>>>> ===================================================================
>>>>> --- lib/Target/R600/SIInstructions.td
>>>>> +++ lib/Target/R600/SIInstructions.td
>>>>> @@ -114,7 +114,7 @@
>>>>>> ;
>>>>> */
>>>>>
>>>>> -let isCompare = 1 in {
>>>>> +let isCompare = 1, Defs = [SCC] in {
>>>>> def S_CMPK_LG_I32 : SOPK_32 <0x00000004, "S_CMPK_LG_I32", []>;
>>>>> def S_CMPK_GT_I32 : SOPK_32 <0x00000005, "S_CMPK_GT_I32", []>;
>>>>> def S_CMPK_GE_I32 : SOPK_32 <0x00000006, "S_CMPK_GE_I32", []>;
>>>>> @@ -126,7 +126,7 @@
>>>>> def S_CMPK_GE_U32 : SOPK_32 <0x0000000c, "S_CMPK_GE_U32", []>;
>>>>> def S_CMPK_LT_U32 : SOPK_32 <0x0000000d, "S_CMPK_LT_U32", []>;
>>>>> def S_CMPK_LE_U32 : SOPK_32 <0x0000000e, "S_CMPK_LE_U32", []>;
>>>>> -} // End isCompare = 1
>>>>> +} // End isCompare = 1, Defs = [SCC]
>>>>>
>>>>> let Defs = [SCC], isCommutable = 1 in {
>>>>> def S_ADDK_I32 : SOPK_32 <0x0000000f, "S_ADDK_I32", []>;
>>>>> @@ -159,7 +159,7 @@
>>>>> defm V_CMP_NLT_F32 : VOPC_32 <0x0000000e, "V_CMP_NLT_F32">;
>>>>> defm V_CMP_TRU_F32 : VOPC_32 <0x0000000f, "V_CMP_TRU_F32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>>
>>>>> defm V_CMPX_F_F32 : VOPC_32 <0x00000010, "V_CMPX_F_F32">;
>>>>> defm V_CMPX_LT_F32 : VOPC_32 <0x00000011, "V_CMPX_LT_F32">;
>>>>> @@ -178,7 +178,7 @@
>>>>> defm V_CMPX_NLT_F32 : VOPC_32 <0x0000001e, "V_CMPX_NLT_F32">;
>>>>> defm V_CMPX_TRU_F32 : VOPC_32 <0x0000001f, "V_CMPX_TRU_F32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_F_F64 : VOPC_64 <0x00000020, "V_CMP_F_F64">;
>>>>> defm V_CMP_LT_F64 : VOPC_64 <0x00000021, "V_CMP_LT_F64", f64, COND_OLT>;
>>>>> @@ -235,7 +235,7 @@
>>>>> defm V_CMPS_NLT_F32 : VOPC_32 <0x0000004e, "V_CMPS_NLT_F32">;
>>>>> defm V_CMPS_TRU_F32 : VOPC_32 <0x0000004f, "V_CMPS_TRU_F32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>>
>>>>> defm V_CMPSX_F_F32 : VOPC_32 <0x00000050, "V_CMPSX_F_F32">;
>>>>> defm V_CMPSX_LT_F32 : VOPC_32 <0x00000051, "V_CMPSX_LT_F32">;
>>>>> @@ -254,7 +254,7 @@
>>>>> defm V_CMPSX_NLT_F32 : VOPC_32 <0x0000005e, "V_CMPSX_NLT_F32">;
>>>>> defm V_CMPSX_TRU_F32 : VOPC_32 <0x0000005f, "V_CMPSX_TRU_F32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMPS_F_F64 : VOPC_64 <0x00000060, "V_CMPS_F_F64">;
>>>>> defm V_CMPS_LT_F64 : VOPC_64 <0x00000061, "V_CMPS_LT_F64">;
>>>>> @@ -303,7 +303,7 @@
>>>>> defm V_CMP_GE_I32 : VOPC_32 <0x00000086, "V_CMP_GE_I32", i32, COND_SGE>;
>>>>> defm V_CMP_T_I32 : VOPC_32 <0x00000087, "V_CMP_T_I32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>>
>>>>> defm V_CMPX_F_I32 : VOPC_32 <0x00000090, "V_CMPX_F_I32">;
>>>>> defm V_CMPX_LT_I32 : VOPC_32 <0x00000091, "V_CMPX_LT_I32">;
>>>>> @@ -314,7 +314,7 @@
>>>>> defm V_CMPX_GE_I32 : VOPC_32 <0x00000096, "V_CMPX_GE_I32">;
>>>>> defm V_CMPX_T_I32 : VOPC_32 <0x00000097, "V_CMPX_T_I32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_F_I64 : VOPC_64 <0x000000a0, "V_CMP_F_I64">;
>>>>> defm V_CMP_LT_I64 : VOPC_64 <0x000000a1, "V_CMP_LT_I64", i64, COND_SLT>;
>>>>> @@ -347,7 +347,7 @@
>>>>> defm V_CMP_GE_U32 : VOPC_32 <0x000000c6, "V_CMP_GE_U32", i32, COND_UGE>;
>>>>> defm V_CMP_T_U32 : VOPC_32 <0x000000c7, "V_CMP_T_U32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>>
>>>>> defm V_CMPX_F_U32 : VOPC_32 <0x000000d0, "V_CMPX_F_U32">;
>>>>> defm V_CMPX_LT_U32 : VOPC_32 <0x000000d1, "V_CMPX_LT_U32">;
>>>>> @@ -358,7 +358,7 @@
>>>>> defm V_CMPX_GE_U32 : VOPC_32 <0x000000d6, "V_CMPX_GE_U32">;
>>>>> defm V_CMPX_T_U32 : VOPC_32 <0x000000d7, "V_CMPX_T_U32">;
>>>>>
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_F_U64 : VOPC_64 <0x000000e0, "V_CMP_F_U64">;
>>>>> defm V_CMP_LT_U64 : VOPC_64 <0x000000e1, "V_CMP_LT_U64", i64, COND_ULT>;
>>>>> @@ -384,9 +384,9 @@
>>>>>
>>>>> defm V_CMP_CLASS_F32 : VOPC_32 <0x00000088, "V_CMP_CLASS_F32">;
>>>>>
>>>>> -let hasSideEffects = 1, Defs = [EXEC] in {
>>>>> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>>>>> defm V_CMPX_CLASS_F32 : VOPC_32 <0x00000098, "V_CMPX_CLASS_F32">;
>>>>> -} // End hasSideEffects = 1, Defs = [EXEC]
>>>>> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>>>>>
>>>>> defm V_CMP_CLASS_F64 : VOPC_64 <0x000000a8, "V_CMP_CLASS_F64">;
>>>>>
>>>>> _______________________________________________
>>>>> llvm-commits mailing list
>>>>> llvm-commits at cs.uiuc.edu
>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>
>>>
>>>
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>> llvm-commits mailing list
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