[llvm] r199328 - [DAGCombiner] Fix a wrong check in method SimplifyVBinOp.

[Patrik Hägglund H]

Thanks! All regressions I saw are cleared now.

Now, there are only (at least several months) old fails left, for example: 

> bin/llvm-stress -size 190 -seed 17377 | bin/llc
LLVM ERROR: Cannot select: 0x170d990: v4i32 = BUILD_VECTOR 0x170de90, 0x170d790, 0x170d790, 0x170de90 [ORD=21] [ID=48]
  0x170de90: i32 = Constant<1> [ID=37]
  0x170d790: i32 = undef [ID=27]
  0x170d790: i32 = undef [ID=27]
  0x170de90: i32 = Constant<1> [ID=37]
In function: autogen_SD17377

/Patrik Hägglund

-----Original Message-----
From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Andrea Di Biagio
Sent: den 15 januari 2014 20:52
To: llvm-commits at cs.uiuc.edu
Subject: [llvm] r199328 - [DAGCombiner] Fix a wrong check in method SimplifyVBinOp.

Author: adibiagio
Date: Wed Jan 15 13:51:32 2014
New Revision: 199328

URL: http://llvm.org/viewvc/llvm-project?rev=199328&view=rev
Log:
[DAGCombiner] Fix a wrong check in method SimplifyVBinOp.

This fixes a regression intruced by r199135.

Revision 199135 tried to simplify part of the logic in method
DAGCombiner::SimplifyVBinOp introducing calls to method BuildVectorSDNode::isConstant().

However, that revision wrongly changed the check performed by method
SimplifyVBinOp to identify dag nodes that can be folded.
Before revision 199135, that method only tried to simplify vector binary operations
if both operands were build_vector of Constant/ConstantFP/Undef only.

After revision 199135, method SimplifyVBinop tried to
simplify also vector binary operations with only one constant operand.

This fixes the problem restoring the old behavior of SimplifyVBinOp.


Added:
    llvm/trunk/test/CodeGen/X86/vbinop-simplify-bug.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=199328&r1=199327&r2=199328&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Jan 15 13:51:32 2014
@@ -10391,8 +10391,8 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNo
   if (LHS.getOpcode() == ISD::BUILD_VECTOR &&
       RHS.getOpcode() == ISD::BUILD_VECTOR) {
     // Check if both vectors are constants. If not bail out.
-    if (!cast<BuildVectorSDNode>(LHS)->isConstant() &&
-        !cast<BuildVectorSDNode>(RHS)->isConstant())
+    if (!(cast<BuildVectorSDNode>(LHS)->isConstant() &&
+          cast<BuildVectorSDNode>(RHS)->isConstant()))
       return SDValue();
 
     SmallVector<SDValue, 8> Ops;

Added: llvm/trunk/test/CodeGen/X86/vbinop-simplify-bug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vbinop-simplify-bug.ll?rev=199328&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vbinop-simplify-bug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vbinop-simplify-bug.ll Wed Jan 15 13:51:32 2014
@@ -0,0 +1,23 @@
+; RUN: llc %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse2 -mcpu=corei7
+
+; Revision 199135 introduced a wrong check in method
+; DAGCombiner::SimplifyVBinOp in an attempt to refactor some code
+; using the new method 'BuildVectorSDNode::isConstant' when possible.
+; 
+; However the modified code in method SimplifyVBinOp now wrongly
+; checks that the operands of a vector bin-op are both constants.
+;
+; With that wrong change, this test started failing because of a
+; 'fatal error in the backend':
+;   Cannot select: 0x2e329d0: v4i32 = BUILD_VECTOR 0x2e2ea00, 0x2e2ea00, 0x2e2ea00, 0x2e2ea00
+;       0x2e2ea00: i32 = Constant<1> [ID=4]
+;       0x2e2ea00: i32 = Constant<1> [ID=4]
+;       0x2e2ea00: i32 = Constant<1> [ID=4]
+;       0x2e2ea00: i32 = Constant<1> [ID=4]
+
+define <8 x i32> @reduced_test_case() {
+  %Shuff = shufflevector <8 x i32> zeroinitializer, <8 x i32> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 undef, i32 7, i32 9, i32 11, i32 13, i32 15>
+  %B23 = sub <8 x i32> %Shuff, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
+  ret <8 x i32> %B23
+}
+


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