[llvm] r199092 - Docs: fix sign of division and increase equivocation on code generated.
Tim Northover
tnorthover at apple.com
Mon Jan 13 02:47:04 PST 2014
Author: tnorthover
Date: Mon Jan 13 04:47:04 2014
New Revision: 199092
URL: http://llvm.org/viewvc/llvm-project?rev=199092&view=rev
Log:
Docs: fix sign of division and increase equivocation on code generated.
I should have been a politician.
Modified:
llvm/trunk/docs/CodeGenerator.rst
Modified: llvm/trunk/docs/CodeGenerator.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.rst?rev=199092&r1=199091&r2=199092&view=diff
==============================================================================
--- llvm/trunk/docs/CodeGenerator.rst (original)
+++ llvm/trunk/docs/CodeGenerator.rst Mon Jan 13 04:47:04 2014
@@ -434,12 +434,12 @@ For example, consider this simple LLVM e
.. code-block:: llvm
define i32 @test(i32 %X, i32 %Y) {
- %Z = udiv i32 %X, %Y
+ %Z = sdiv i32 %X, %Y
ret i32 %Z
}
-The X86 instruction selector produces this machine code for the ``div`` and
-``ret`` (use "``llc X.bc -march=x86 -print-machineinstrs``" to get this):
+The X86 instruction selector might produce this machine code for the ``div`` and
+``ret``:
.. code-block:: llvm
@@ -454,8 +454,8 @@ The X86 instruction selector produces th
%EAX = mov %reg1026 ;; 32-bit return value goes in EAX
ret
-By the end of code generation, the register allocator has coalesced the
-registers and deleted the resultant identity moves producing the following
+By the end of code generation, the register allocator would coalesce the
+registers and delete the resultant identity moves producing the following
code:
.. code-block:: llvm
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