[llvm] r198592 - [Sparc] Explicitly cast -1 to unsigned to fix buildbot errors.

Venkatraman Govindaraju venkatra at cs.wisc.edu
Sat Jan 11 20:47:28 PST 2014


Replaced to ~0U in revision r199031

Thanks
Venkatraman

On Sat, Jan 11, 2014 at 4:47 PM, Reid Kleckner <rnk at google.com> wrote:
> Bikesheddy thing: you can write this ~0U, which seems prevalent in Clang.
>
>
> On Mon, Jan 6, 2014 at 1:24 AM, Venkatraman Govindaraju
> <venkatra at cs.wisc.edu> wrote:
>>
>> Author: venkatra
>> Date: Mon Jan  6 02:24:44 2014
>> New Revision: 198592
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=198592&view=rev
>> Log:
>> [Sparc] Explicitly cast -1 to unsigned to fix buildbot errors.
>>
>> Modified:
>>     llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
>>
>> Modified: llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp?rev=198592&r1=198591&r2=198592&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
>> (original)
>> +++ llvm/trunk/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp Mon Jan
>> 6 02:24:44 2014
>> @@ -104,14 +104,14 @@ static const unsigned DFPRegDecoderTable
>>    SP::D14,  SP::D30,  SP::D15,  SP::D31 };
>>
>>  static const unsigned QFPRegDecoderTable[] = {
>> -  SP::Q0,  SP::Q8,   -1, -1,
>> -  SP::Q1,  SP::Q9,   -1, -1,
>> -  SP::Q2,  SP::Q10,  -1, -1,
>> -  SP::Q3,  SP::Q11,  -1, -1,
>> -  SP::Q4,  SP::Q12,  -1, -1,
>> -  SP::Q5,  SP::Q13,  -1, -1,
>> -  SP::Q6,  SP::Q14,  -1, -1,
>> -  SP::Q7,  SP::Q15,  -1, -1 } ;
>> +  SP::Q0,  SP::Q8,   (unsigned)-1,  (unsigned)-1,
>> +  SP::Q1,  SP::Q9,   (unsigned)-1,  (unsigned)-1,
>> +  SP::Q2,  SP::Q10,  (unsigned)-1,  (unsigned)-1,
>> +  SP::Q3,  SP::Q11,  (unsigned)-1,  (unsigned)-1,
>> +  SP::Q4,  SP::Q12,  (unsigned)-1,  (unsigned)-1,
>> +  SP::Q5,  SP::Q13,  (unsigned)-1,  (unsigned)-1,
>> +  SP::Q6,  SP::Q14,  (unsigned)-1,  (unsigned)-1,
>> +  SP::Q7,  SP::Q15,  (unsigned)-1,  (unsigned)-1 } ;
>>
>>  static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst,
>>                                                 unsigned RegNo,
>>
>>
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