[llvm] r198010 - Support for microMIPS load effective address.

[Rafael Espíndola]

On 25 December 2013 05:14, Zoran Jovanovic <zoran.jovanovic at imgtec.com> wrote:
> Author: zjovanovic
> Date: Wed Dec 25 04:14:07 2013
> New Revision: 198010
>
> URL: http://llvm.org/viewvc/llvm-project?rev=198010&view=rev
> Log:
> Support for microMIPS load effective address.
>
> Added:
>     llvm/trunk/test/MC/Mips/micromips-load-effective-address.s

This is a codegen test. Why is it in test/MC?

> Modified:
>     llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
>     llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
>
> Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=198010&r1=198009&r2=198010&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Wed Dec 25 04:14:07 2013
> @@ -78,6 +78,9 @@ let DecoderNamespace = "MicroMips", Pred
>                   ADDI_FM_MM<0x1c>;
>    def LUi_MM   : MMRel, LoadUpper<"lui", GPR32Opnd, uimm16>, LUI_FM_MM;
>
> +  def LEA_ADDiu_MM : MMRel, EffectiveAddress<"addiu", GPR32Opnd>,
> +                     LW_FM_MM<0xc>;
> +
>    /// Arithmetic Instructions (3-Operand, R-Type)
>    def ADDu_MM  : MMRel, ArithLogicR<"addu", GPR32Opnd>, ADD_FM_MM<0, 0x150>;
>    def SUBu_MM  : MMRel, ArithLogicR<"subu", GPR32Opnd>, ADD_FM_MM<0, 0x1d0>;
>
> Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=198010&r1=198009&r2=198010&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Wed Dec 25 04:14:07 2013
> @@ -747,7 +747,8 @@ class MoveToLOHI<string opstr, RegisterO
>
>  class EffectiveAddress<string opstr, RegisterOperand RO> :
>    InstSE<(outs RO:$rt), (ins mem_ea:$addr), !strconcat(opstr, "\t$rt, $addr"),
> -         [(set RO:$rt, addr:$addr)], NoItinerary, FrmI> {
> +         [(set RO:$rt, addr:$addr)], NoItinerary, FrmI,
> +         !strconcat(opstr, "_lea")> {
>    let isCodeGenOnly = 1;
>    let DecoderMethod = "DecodeMem";
>  }
> @@ -1094,7 +1095,7 @@ def NOP : PseudoSE<(outs), (ins), []>, P
>  // instructions. The same not happens for stack address copies, so an
>  // add op with mem ComplexPattern is used and the stack address copy
>  // can be matched. It's similar to Sparc LEA_ADDRi
> -def LEA_ADDiu : EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>;
> +def LEA_ADDiu : MMRel, EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>;
>
>  // MADD*/MSUB*
>  def MADD  : MMRel, MArithR<"madd", 1>, MULT_FM<0x1c, 0>;
>
> Added: llvm/trunk/test/MC/Mips/micromips-load-effective-address.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-load-effective-address.s?rev=198010&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/Mips/micromips-load-effective-address.s (added)
> +++ llvm/trunk/test/MC/Mips/micromips-load-effective-address.s Wed Dec 25 04:14:07 2013
> @@ -0,0 +1,29 @@
> +; RUN: llc %s -march=mipsel -mattr=micromips -filetype=asm \
> +; RUN: -relocation-model=pic -O3 -o - | FileCheck %s
> +
> +define i32 @sum(i32* %x, i32* %y) nounwind uwtable {
> +entry:
> +  %x.addr = alloca i32*, align 8
> +  %y.addr = alloca i32*, align 8
> +  store i32* %x, i32** %x.addr, align 8
> +  store i32* %y, i32** %y.addr, align 8
> +  %0 = load i32** %x.addr, align 8
> +  %1 = load i32* %0, align 4
> +  %2 = load i32** %y.addr, align 8
> +  %3 = load i32* %2, align 4
> +  %add = add nsw i32 %1, %3
> +  ret i32 %add
> +}
> +
> +define i32 @main() nounwind uwtable {
> +entry:
> +  %retval = alloca i32, align 4
> +  %x = alloca i32, align 4
> +  %y = alloca i32, align 4
> +  store i32 0, i32* %retval
> +  %call = call i32 @sum(i32* %x, i32* %y)
> +  ret i32 %call
> +}
> +
> +; CHECK: addiu ${{[0-9]+}}, $sp, {{[0-9]+}}
> +; CHECK: addiu ${{[0-9]+}}, $sp, {{[0-9]+}}
>
>
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