[CLANG PATCH] Add '-m16' argument to use new x86_16 target

David Woodhouse dwmw2 at infradead.org
Wed Jan 8 06:33:34 PST 2014


I just posted a patch to llvm-commits which adds the x86_16 target. This
is the corresponding -m16 support for clang. With this a trivial patch
to make the Linux kernel use this (https://lkml.org/lkml/2014/1/8/196),
I can now successfully build the 16-bit startup code and get a bootable
kernel.

(As long as I work around PR3997, that is.)

---
 include/clang/Driver/Options.td |  1 +
 lib/Basic/Targets.cpp           | 15 +++++++++++----
 lib/CodeGen/CGBuiltin.cpp       |  1 +
 lib/CodeGen/TargetInfo.cpp      |  4 +++-
 lib/Driver/Driver.cpp           | 14 ++++++++++----
 lib/Driver/ToolChains.cpp       |  1 +
 lib/Driver/Tools.cpp            | 18 ++++++++++++++----
 7 files changed, 41 insertions(+), 13 deletions(-)

diff --git a/include/clang/Driver/Options.td b/include/clang/Driver/Options.td
index e1930a2..ebd52d0 100644
--- a/include/clang/Driver/Options.td
+++ b/include/clang/Driver/Options.td
@@ -958,6 +958,7 @@ def lazy__framework : Separate<["-"], "lazy_framework">, Flags<[LinkerInput]>;
 def lazy__library : Separate<["-"], "lazy_library">, Flags<[LinkerInput]>;
 def EL : Flag<["-"], "EL">, Flags<[DriverOption]>;
 def EB : Flag<["-"], "EB">, Flags<[DriverOption]>;
+def m16 : Flag<["-"], "m16">, Group<m_Group>, Flags<[DriverOption, CoreOption]>;
 def m32 : Flag<["-"], "m32">, Group<m_Group>, Flags<[DriverOption, CoreOption]>;
 def mqdsp6_compat : Flag<["-"], "mqdsp6-compat">, Group<m_Group>, Flags<[DriverOption,CC1Option]>,
   HelpText<"Enable hexagon-qdsp6 backward compatibility">;
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 9dcd027..44b4a2a 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -235,6 +235,7 @@ public:
     switch (Triple.getArch()) {
     default:
     case llvm::Triple::x86:
+    case llvm::Triple::x86_16:
     case llvm::Triple::x86_64:
       this->MCountName = ".mcount";
       break;
@@ -272,6 +273,7 @@ public:
     switch (Triple.getArch()) {
     default:
     case llvm::Triple::x86:
+    case llvm::Triple::x86_16:
     case llvm::Triple::x86_64:
       this->MCountName = ".mcount";
       break;
@@ -406,6 +408,7 @@ public:
       switch (Triple.getArch()) {
         default:
         case llvm::Triple::x86:
+        case llvm::Triple::x86_16:
         case llvm::Triple::x86_64:
         case llvm::Triple::arm:
         case llvm::Triple::sparc:
@@ -626,7 +629,8 @@ public:
     this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
     if (Triple.getArch() == llvm::Triple::arm) {
       this->DescriptionString = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S128";
-    } else if (Triple.getArch() == llvm::Triple::x86) {
+    } else if (Triple.getArch() == llvm::Triple::x86 ||
+               Triple.getArch() == llvm::Triple::x86_16) {
       this->DescriptionString = "e-m:e-p:32:32-i64:64-n8:16:32-S128";
     } else if (Triple.getArch() == llvm::Triple::x86_64) {
       this->DescriptionString = "e-m:e-p:32:32-i64:64-n8:16:32:64-S128";
@@ -1827,7 +1831,7 @@ public:
   virtual const char* getABI() const {
     if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
       return "avx";
-    else if (getTriple().getArch() == llvm::Triple::x86 &&
+    else if (getTriple().getArch() != llvm::Triple::x86_64 &&
              MMX3DNowLevel == NoMMX3DNow)
       return "no-mmx";
     return "";
@@ -1926,7 +1930,7 @@ public:
     case CK_AthlonMP:
     case CK_Geode:
       // Only accept certain architectures when compiling in 32-bit mode.
-      if (getTriple().getArch() != llvm::Triple::x86)
+      if (getTriple().getArch() == llvm::Triple::x86_64)
         return false;
 
       // Fallthrough
@@ -2761,7 +2765,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
     break;
   }
 
-  if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
+  if (Opts.MicrosoftExt && getTriple().getArch() != llvm::Triple::x86_64) {
     switch (SSELevel) {
     case AVX512F:
     case AVX2:
@@ -2838,6 +2842,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
       .Case("sse4a", XOPLevel >= SSE4A)
       .Case("x86", true)
       .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
+      .Case("x86_16", getTriple().getArch() == llvm::Triple::x86_16)
       .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
       .Case("xop", XOPLevel >= XOP)
       .Default(false);
@@ -3149,6 +3154,7 @@ public:
     switch (Triple.getArch()) {
     default:
     case llvm::Triple::x86:
+    case llvm::Triple::x86_16:
       // this->MCountName = ".mcount";
       break;
     case llvm::Triple::mips:
@@ -5725,6 +5731,7 @@ static TargetInfo *AllocateTarget(const llvm::Triple &Triple) {
     return new TCETargetInfo(Triple);
 
   case llvm::Triple::x86:
+  case llvm::Triple::x86_16:
     if (Triple.isOSDarwin())
       return new DarwinI386TargetInfo(Triple);
 
diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp
index 267dea0..a705755 100644
--- a/lib/CodeGen/CGBuiltin.cpp
+++ b/lib/CodeGen/CGBuiltin.cpp
@@ -1596,6 +1596,7 @@ Value *CodeGenFunction::EmitTargetBuiltinExpr(unsigned BuiltinID,
   case llvm::Triple::thumb:
     return EmitARMBuiltinExpr(BuiltinID, E);
   case llvm::Triple::x86:
+  case llvm::Triple::x86_16:
   case llvm::Triple::x86_64:
     return EmitX86BuiltinExpr(BuiltinID, E);
   case llvm::Triple::ppc:
diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
index da62775..a9c47ff 100644
--- a/lib/CodeGen/TargetInfo.cpp
+++ b/lib/CodeGen/TargetInfo.cpp
@@ -4540,7 +4540,8 @@ llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
 
 bool X86_32TargetCodeGenInfo::isStructReturnInRegABI(
     const llvm::Triple &Triple, const CodeGenOptions &Opts) {
-  assert(Triple.getArch() == llvm::Triple::x86);
+  assert(Triple.getArch() == llvm::Triple::x86 ||
+         Triple.getArch() == llvm::Triple::x86_16);
 
   switch (Opts.getStructReturnConvention()) {
   case CodeGenOptions::SRCK_Default:
@@ -5584,6 +5585,7 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
   case llvm::Triple::tce:
     return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types));
 
+  case llvm::Triple::x86_16:
   case llvm::Triple::x86: {
     bool IsDarwinVectorABI = Triple.isOSDarwin();
     bool IsSmallStructInRegABI =
diff --git a/lib/Driver/Driver.cpp b/lib/Driver/Driver.cpp
index 745497f..f75a69b 100644
--- a/lib/Driver/Driver.cpp
+++ b/lib/Driver/Driver.cpp
@@ -1912,17 +1912,23 @@ static llvm::Triple computeTargetTriple(StringRef DefaultTargetTriple,
 
   // Handle pseudo-target flags '-m32' and '-m64'.
   // FIXME: Should this information be in llvm::Triple?
-  if (Arg *A = Args.getLastArg(options::OPT_m32, options::OPT_m64)) {
+  if (Arg *A = Args.getLastArg(options::OPT_m32, options::OPT_m64, options::OPT_m16)) {
     if (A->getOption().matches(options::OPT_m32)) {
-      if (Target.getArch() == llvm::Triple::x86_64)
+      if (Target.getArch() == llvm::Triple::x86_64 ||
+          Target.getArch() == llvm::Triple::x86_16)
         Target.setArch(llvm::Triple::x86);
       if (Target.getArch() == llvm::Triple::ppc64)
         Target.setArch(llvm::Triple::ppc);
-    } else {
-      if (Target.getArch() == llvm::Triple::x86)
+    } else if (A->getOption().matches(options::OPT_m64)) {
+      if (Target.getArch() == llvm::Triple::x86 ||
+	  Target.getArch() == llvm::Triple::x86_16)
         Target.setArch(llvm::Triple::x86_64);
       if (Target.getArch() == llvm::Triple::ppc)
         Target.setArch(llvm::Triple::ppc64);
+    } else {
+      if (Target.getArch() == llvm::Triple::x86 ||
+          Target.getArch() == llvm::Triple::x86_64)
+        Target.setArch(llvm::Triple::x86_16);
     }
   }
 
diff --git a/lib/Driver/ToolChains.cpp b/lib/Driver/ToolChains.cpp
index 8fc838d..9d9675b 100644
--- a/lib/Driver/ToolChains.cpp
+++ b/lib/Driver/ToolChains.cpp
@@ -1646,6 +1646,7 @@ bool Generic_GCC::isPICDefaultForced() const {
 
 bool Generic_GCC::IsIntegratedAssemblerDefault() const {
   return getTriple().getArch() == llvm::Triple::x86 ||
+         getTriple().getArch() == llvm::Triple::x86_16 ||
          getTriple().getArch() == llvm::Triple::x86_64 ||
          getTriple().getArch() == llvm::Triple::aarch64 ||
          getTriple().getArch() == llvm::Triple::arm ||
diff --git a/lib/Driver/Tools.cpp b/lib/Driver/Tools.cpp
index 6ecc013..2be7647 100644
--- a/lib/Driver/Tools.cpp
+++ b/lib/Driver/Tools.cpp
@@ -1466,6 +1466,7 @@ static void getTargetFeatures(const Driver &D, const llvm::Triple &Triple,
     getAArch64TargetFeatures(D, Args, Features);
     break;
   case llvm::Triple::x86:
+  case llvm::Triple::x86_16:
   case llvm::Triple::x86_64:
     getX86TargetFeatures(Triple, Args, Features);
     break;
@@ -1847,6 +1848,7 @@ static bool shouldUseFramePointerForTarget(const ArgList &Args,
   case llvm::Triple::mipsel:
   case llvm::Triple::systemz:
   case llvm::Triple::x86:
+  case llvm::Triple::x86_16:
   case llvm::Triple::x86_64:
     if (Triple.isOSLinux())
       if (Arg *A = Args.getLastArg(options::OPT_O_Group))
@@ -2220,7 +2222,8 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
 
   if (Arg *A = Args.getLastArg(options::OPT_fpcc_struct_return,
                                options::OPT_freg_struct_return)) {
-    if (getToolChain().getArch() != llvm::Triple::x86) {
+    if (getToolChain().getArch() != llvm::Triple::x86 &&
+        getToolChain().getArch() != llvm::Triple::x86_16) {
       D.Diag(diag::err_drv_unsupported_opt_for_target)
         << A->getSpelling() << getToolChain().getTriple().str();
     } else if (A->getOption().matches(options::OPT_fpcc_struct_return)) {
@@ -2494,6 +2497,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
     break;
 
   case llvm::Triple::x86:
+  case llvm::Triple::x86_16:
   case llvm::Triple::x86_64:
     AddX86TargetArgs(Args, CmdArgs);
     break;
@@ -4123,7 +4127,9 @@ void gcc::Common::ConstructJob(Compilation &C, const JobAction &JA,
   //
   // FIXME: The triple class should directly provide the information we want
   // here.
-  if (Arch == llvm::Triple::x86 || Arch == llvm::Triple::ppc)
+  if (Arch == llvm::Triple::x86_16)
+    CmdArgs.push_back("-m16");
+  else if (Arch == llvm::Triple::x86 || Arch == llvm::Triple::ppc)
     CmdArgs.push_back("-m32");
   else if (Arch == llvm::Triple::x86_64 || Arch == llvm::Triple::ppc64 ||
            Arch == llvm::Triple::ppc64le)
@@ -4706,6 +4712,7 @@ void darwin::Assemble::ConstructJob(Compilation &C, const JobAction &JA,
 
   // Use -force_cpusubtype_ALL on x86 by default.
   if (getToolChain().getArch() == llvm::Triple::x86 ||
+      getToolChain().getArch() == llvm::Triple::x86_16 ||
       getToolChain().getArch() == llvm::Triple::x86_64 ||
       Args.hasArg(options::OPT_force__cpusubtype__ALL))
     CmdArgs.push_back("-force_cpusubtype_ALL");
@@ -4785,9 +4792,11 @@ void darwin::Link::AddLinkArgs(Compilation &C,
     // Don't pass -demangle to ld_classic.
     //
     // FIXME: This is a temporary workaround, ld should be handling this.
-    bool UsesLdClassic = (getToolChain().getArch() == llvm::Triple::x86 &&
+    bool UsesLdClassic = ((getToolChain().getArch() == llvm::Triple::x86_16 ||
+                           getToolChain().getArch() == llvm::Triple::x86) &&
                           Args.hasArg(options::OPT_static));
-    if (getToolChain().getArch() == llvm::Triple::x86) {
+    if (getToolChain().getArch() == llvm::Triple::x86 ||
+        getToolChain().getArch() == llvm::Triple::x86_16) {
       for (arg_iterator it = Args.filtered_begin(options::OPT_Xlinker,
                                                  options::OPT_Wl_COMMA),
              ie = Args.filtered_end(); it != ie; ++it) {
@@ -5274,6 +5283,7 @@ void solaris::Link::ConstructJob(Compilation &C, const JobAction &JA,
   llvm::Triple::ArchType Arch = T.getArch();
   switch (Arch) {
   case llvm::Triple::x86:
+  case llvm::Triple::x86_16:
     GCCLibPath +=
         ("i386-" + T.getVendorName() + "-" + T.getOSName()).str() + "/4.5.2/";
     break;
-- 
1.8.4.2


-- 
David Woodhouse                            Open Source Technology Centre
David.Woodhouse at intel.com                              Intel Corporation
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