[llvm] r198611 - XCore target: Refactor LR handling
Robert Lytton
robert at xmos.com
Mon Jan 6 06:20:41 PST 2014
Author: rlytton
Date: Mon Jan 6 08:20:41 2014
New Revision: 198611
URL: http://llvm.org/viewvc/llvm-project?rev=198611&view=rev
Log:
XCore target: Refactor LR handling
We also narrow the liveness of FP & LR during the prologue to
reflect the actual usage of the registers.
I have been unable to construct a test to prove the previous live
range was too large.
Modified:
llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp
llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.cpp
llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h
Modified: llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp?rev=198611&r1=198610&r2=198611&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp Mon Jan 6 08:20:41 2014
@@ -170,7 +170,7 @@ void XCoreFrameLowering::emitPrologue(Ma
const int FrameSize = MFI->getStackSize() / 4;
int Adjusted = 0;
- bool saveLR = XFI->getUsesLR();
+ bool saveLR = XFI->hasLRSpillSlot();
bool UseENTSP = saveLR && FrameSize
&& (MFI->getObjectOffset(XFI->getLRSpillSlot()) == 0);
if (UseENTSP)
@@ -182,8 +182,10 @@ void XCoreFrameLowering::emitPrologue(Ma
// Allocate space on the stack at the same time as saving LR.
Adjusted = (FrameSize > MaxImmU16) ? MaxImmU16 : FrameSize;
int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6;
- BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(Adjusted);
MBB.addLiveIn(XCore::LR);
+ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opcode));
+ MIB.addImm(Adjusted);
+ MIB->addRegisterKilled(XCore::LR, MF.getTarget().getRegisterInfo(), true);
if (emitFrameMoves) {
EmitDefCfaOffset(MBB, MBBI, dl, TII, MMI, Adjusted*4);
unsigned DRegNum = MRI->getDwarfRegNum(XCore::LR, true);
@@ -204,8 +206,9 @@ void XCoreFrameLowering::emitPrologue(Ma
emitFrameMoves);
int Offset = Adjusted - OffsetFromTop;
int Opcode = isImmU6(Offset) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
- BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addReg(SpillReg).addImm(Offset);
MBB.addLiveIn(SpillReg);
+ BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addReg(SpillReg, RegState::Kill)
+ .addImm(Offset);
if (emitFrameMoves) {
unsigned DRegNum = MRI->getDwarfRegNum(SpillReg, true);
EmitCfiOffset(MBB, MBBI, dl, TII, MMI, DRegNum, SpillOffset, NULL);
@@ -241,12 +244,13 @@ void XCoreFrameLowering::emitPrologue(Ma
void XCoreFrameLowering::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
- MachineFrameInfo *MFI = MF.getFrameInfo();
+ MachineFrameInfo *MFI = MF.getFrameInfo();
MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
const XCoreInstrInfo &TII =
*static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
DebugLoc dl = MBBI->getDebugLoc();
+ unsigned RetOpcode = MBBI->getOpcode();
// Work out frame sizes.
// We will adjust the SP in stages towards the final FrameSize.
@@ -254,7 +258,7 @@ void XCoreFrameLowering::emitEpilogue(Ma
assert(RemainingAdj%4 == 0 && "Misaligned frame size");
RemainingAdj /= 4;
- bool restoreLR = XFI->getUsesLR();
+ bool restoreLR = XFI->hasLRSpillSlot();
bool UseRETSP = restoreLR && RemainingAdj
&& (MFI->getObjectOffset(XFI->getLRSpillSlot()) == 0);
if (UseRETSP)
@@ -285,8 +289,8 @@ void XCoreFrameLowering::emitEpilogue(Ma
IfNeededLDAWSP(MBB, MBBI, dl, TII, 0, RemainingAdj);
if (UseRETSP) {
// Fold prologue into return instruction
- assert(MBBI->getOpcode() == XCore::RETSP_u6
- || MBBI->getOpcode() == XCore::RETSP_lu6);
+ assert(RetOpcode == XCore::RETSP_u6
+ || RetOpcode == XCore::RETSP_lu6);
int Opcode = isImmU6(RemainingAdj) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opcode))
.addImm(RemainingAdj);
@@ -312,7 +316,6 @@ spillCalleeSavedRegisters(MachineBasicBl
MachineFunction *MF = MBB.getParent();
const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
-
XCoreFunctionInfo *XFI = MF->getInfo<XCoreFunctionInfo>();
bool emitFrameMoves = XCoreRegisterInfo::needsFrameMoves(*MF);
@@ -322,13 +325,11 @@ spillCalleeSavedRegisters(MachineBasicBl
for (std::vector<CalleeSavedInfo>::const_iterator it = CSI.begin();
it != CSI.end(); ++it) {
- // Add the callee-saved register as live-in. It's killed at the spill.
- MBB.addLiveIn(it->getReg());
-
unsigned Reg = it->getReg();
+ // Add the callee-saved register as live-in. It's killed at the spill.
+ MBB.addLiveIn(Reg);
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
- TII.storeRegToStackSlot(MBB, MI, Reg, true,
- it->getFrameIdx(), RC, TRI);
+ TII.storeRegToStackSlot(MBB, MI, Reg, true, it->getFrameIdx(), RC, TRI);
if (emitFrameMoves) {
MCSymbol *SaveLabel = MF->getContext().CreateTempSymbol();
BuildMI(MBB, MI, DL, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLabel);
@@ -354,8 +355,7 @@ restoreCalleeSavedRegisters(MachineBasic
it != CSI.end(); ++it) {
unsigned Reg = it->getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
- TII.loadRegFromStackSlot(MBB, MI, it->getReg(), it->getFrameIdx(),
- RC, TRI);
+ TII.loadRegFromStackSlot(MBB, MI, Reg, it->getFrameIdx(), RC, TRI);
assert(MI != MBB.begin() &&
"loadRegFromStackSlot didn't insert any code!");
// Insert in reverse order. loadRegFromStackSlot can insert multiple
@@ -425,32 +425,18 @@ eliminateCallFramePseudoInstr(MachineFun
void XCoreFrameLowering::
processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS) const {
- MachineFrameInfo *MFI = MF.getFrameInfo();
- bool LRUsed = MF.getRegInfo().isPhysRegUsed(XCore::LR);
- const TargetRegisterClass *RC = &XCore::GRRegsRegClass;
XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
- if (LRUsed) {
- MF.getRegInfo().setPhysRegUnused(XCore::LR);
- bool isVarArg = MF.getFunction()->isVarArg();
- int FrameIdx;
- if (! isVarArg) {
- // A fixed offset of 0 allows us to save/restore LR using entsp/retsp.
- FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true);
- } else {
- FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(),
- false);
- }
- XFI->setUsesLR(FrameIdx);
- XFI->setLRSpillSlot(FrameIdx);
+ // We will handling LR in the prologue/epilogue
+ // and space on the stack ourselves.
+ if (MF.getRegInfo().isPhysRegUsed(XCore::LR)) {
+ MF.getRegInfo().setPhysRegUnused(XCore::LR);
+ XFI->createLRSpillSlot(MF);
}
-
// A callee save register is used to hold the FP.
// This needs saving / restoring in the epilogue / prologue.
if (hasFP(MF))
- XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(),
- RC->getAlignment(),
- false));
+ XFI->createFPSpillSlot(MF);
}
void XCoreFrameLowering::
Modified: llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.cpp?rev=198611&r1=198610&r2=198611&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.cpp Mon Jan 6 08:20:41 2014
@@ -8,6 +8,8 @@
//===----------------------------------------------------------------------===//
#include "XCoreMachineFunctionInfo.h"
+#include "XCoreInstrInfo.h"
+#include "llvm/IR/Function.h"
using namespace llvm;
@@ -28,3 +30,31 @@ bool XCoreFunctionInfo::isLargeFrame(con
// 16KB of function arguments.
return CachedEStackSize > 0xf000;
}
+
+int XCoreFunctionInfo::createLRSpillSlot(MachineFunction &MF) {
+ if (LRSpillSlotSet) {
+ return LRSpillSlot;
+ }
+ const TargetRegisterClass *RC = &XCore::GRRegsRegClass;
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ if (! MF.getFunction()->isVarArg()) {
+ // A fixed offset of 0 allows us to save / restore LR using entsp / retsp.
+ LRSpillSlot = MFI->CreateFixedObject(RC->getSize(), 0, true);
+ } else {
+ LRSpillSlot = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(), true);
+ }
+ LRSpillSlotSet = true;
+ return LRSpillSlot;
+}
+
+int XCoreFunctionInfo::createFPSpillSlot(MachineFunction &MF) {
+ if (FPSpillSlotSet) {
+ return FPSpillSlot;
+ }
+ const TargetRegisterClass *RC = &XCore::GRRegsRegClass;
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ FPSpillSlot = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(), true);
+ FPSpillSlotSet = true;
+ return FPSpillSlot;
+}
+
Modified: llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h?rev=198611&r1=198610&r2=198611&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h (original)
+++ llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h Mon Jan 6 08:20:41 2014
@@ -27,8 +27,9 @@ class Function;
/// XCore target-specific information for each MachineFunction.
class XCoreFunctionInfo : public MachineFunctionInfo {
virtual void anchor();
- bool UsesLR;
+ bool LRSpillSlotSet;
int LRSpillSlot;
+ bool FPSpillSlotSet;
int FPSpillSlot;
int VarArgsFrameIndex;
mutable int CachedEStackSize;
@@ -36,15 +37,17 @@ class XCoreFunctionInfo : public Machine
public:
XCoreFunctionInfo() :
- UsesLR(false),
+ LRSpillSlotSet(false),
LRSpillSlot(0),
+ FPSpillSlotSet(false),
FPSpillSlot(0),
VarArgsFrameIndex(0),
CachedEStackSize(-1) {}
explicit XCoreFunctionInfo(MachineFunction &MF) :
- UsesLR(false),
+ LRSpillSlotSet(false),
LRSpillSlot(0),
+ FPSpillSlotSet(false),
FPSpillSlot(0),
VarArgsFrameIndex(0),
CachedEStackSize(-1) {}
@@ -53,16 +56,21 @@ public:
void setVarArgsFrameIndex(int off) { VarArgsFrameIndex = off; }
int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
-
- void setUsesLR(bool val) { UsesLR = val; }
- bool getUsesLR() const { return UsesLR; }
-
- void setLRSpillSlot(int off) { LRSpillSlot = off; }
- int getLRSpillSlot() const { return LRSpillSlot; }
-
- void setFPSpillSlot(int off) { FPSpillSlot = off; }
- int getFPSpillSlot() const { return FPSpillSlot; }
-
+
+ int createLRSpillSlot(MachineFunction &MF);
+ bool hasLRSpillSlot() { return LRSpillSlotSet; }
+ int getLRSpillSlot() const {
+ assert(LRSpillSlotSet && "LR Spill slot no set");
+ return LRSpillSlot;
+ }
+
+ int createFPSpillSlot(MachineFunction &MF);
+ bool hasFPSpillSlot() { return FPSpillSlotSet; }
+ int getFPSpillSlot() const {
+ assert(FPSpillSlotSet && "FP Spill slot no set");
+ return FPSpillSlot;
+ }
+
bool isLargeFrame(const MachineFunction &MF) const;
std::vector<std::pair<MCSymbol*, CalleeSavedInfo> > &getSpillLabels() {
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