[PATCHES v4] [x86] Fix 16-bit addressing modes (PR18220), incorrect encoding of relaxed instructions (PR18303) and implement .code16 (PR8684)

[David Woodhouse]

This is the fourth and hopefully final round of the patches to
add .code16 support and fix some pre-existing bugs which get in the way
of that. The patches are attached below, and can also be found in my git
tree at:

	http://git.infradead.org/users/dwmw2/llvm.git
	 git://git.infradead.org/users/dwmw2/llvm.git


It would be nice to support the explicit data32 and addr32 prefixes
which gas supports, but I don't consider that a showstopper. The data32
prefix is almost always gratuitous, since instructions can just be given
with an explicit operand size (e.g. movl vs. movw). And addr32 isn't
needed here either since we'll automatically use 32-bit addressing when
we need to, while gas would *insist* on an explicit 'addr32'.

It should now be possible to add a '-m16' option to CLANG which
parallels the use of .code16gcc with GCC (which is used by 16-bit
startup code in the Linux kernel). I've done a quick test of this, and
its output looks *vaguely* sane. Will explore that some more once the
first round of patches is merged.

=========================
Version 4:

- User feedback found PR18303, which is now fixed in patch #2 of the
  series. I posted a couple of versions of this; this is the latest one
  which stores the current features bits in the MCRelaxableFragment as
  the instructions are first emitted, and then uses those features when
  subsequently re-encoding the instruction after relaxation. (As opposed
  to using the features that happen to be left active when the AsmParser
  finished parsing the file, which is the cause of the bug.)

- Use three separate feature bits for 16/32/64-bit mode instead of only
  16-bit and 64-bit flags.

- Patches attached instead of in mail thread, for the benefit of those
  whose mailers can't cope with threading.

=========================
Version 3:

- Be less taciturn in comments.

- Fix some indentation errors.

- Add test cases incrementally as things start to work.

- Drop the renaming of In32BitMode -> Not64BitMode since that was merged
  already in r197768... which also means we can:

- Subsume the addition of In32BitMode, In16BitMode and Not16BitMode into
  the patch which adds .code16 support, rather than having it separate.

- Drop rdar:// and PR comments from x86-16.s since they're pointless and
  Eric is apparently going to drop them from the x86-32 version too.

- Fix EH_RETURN/EH_RETURN64 handling to use is64BitMode() to choose
  between RETQ and RETL, like everything else in that patch did. There
  *may* be a potential micro-optimisation there, but it's probably not
  worth it. Eric made a cryptic comment about this patch which I also
  preserved for posterity, but I have no idea what it meant.

=========================
Version 2:

Dropped the reloc_signed_2byte patch since I don't think it was
necessary. Now it just uses FK_Data_2. We don't have a corresponding
signed relocation type anyway (in ELF at least).

Fixed more instructions to work correctly in 16-bit mode and added test
cases for it all (including some in .code32 for the 16-bit addressing
modes)

-- 
David Woodhouse                            Open Source Technology Centre
David.Woodhouse at intel.com                              Intel Corporation
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