[PATCH][AVX512] Add intrinsics for Packed Absolute Value

[Bader, Aleksey A]

Hi Cameron,

>Also, does GCC mention how they will handle zero-merging intrinsics?
>It wasn't obvious to me looking at their documents.

It's not obvious to me too, but as far as I can see they don't introduce new instrinsics for zero-merging version:

extern __inline __m512d
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_mov_pd (__m512d __W, __mmask8 __U, __m512d __A)
{
  return (__m512d) __builtin_ia32_movapd512_mask ((__v8df) __A,
						  (__v8df) __W,
						  (__mmask8) __U);
}

extern __inline __m512d
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_mov_pd (__mmask8 __U, __m512d __A)
{
  return (__m512d) __builtin_ia32_movapd512_mask ((__v8df) __A,
						  (__v8df)
						  _mm512_setzero_pd (),   <<< zeroing old value
						  (__mmask8) __U);
}

It seems they catch the patter later in the codegen (otherwise it would be additional instruction + dependency).
It looks reasonable because eventually you want to have patterns for all instructions with zero-merging masks that will catch AVX-512 instructions with zeroed destination, so they've decided re-use those patterns and do not increase built-in count as with non-masked intrinsics.

Alexey

-----Original Message-----
From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Demikhovsky, Elena
Sent: Wednesday, December 25, 2013 11:28 AM
To: cameron.mcinally at nyu.edu
Cc: llvm-commits at cs.uiuc.edu
Subject: RE: [PATCH][AVX512] Add intrinsics for Packed Absolute Value

Hi Cameron,

I asked GCC people. This is their answer:
"
Built-ins are defined by compiler while intrinsics defined by Intel.
We need to support all the intrinsics with minimum built-ins count.
Introduction of non-masked variants will double built-in count and will add no new functionality.
That is why we model nonmask built-ins with mask ones.
"

You can add the following pattern and avoid extra reg dependencies.

def : Pat<(int_x86_avx512_mask_pabs_d_512 (v16i32 (IMPLICIT_DEF)), VR512:$src, (i16 -1)),
          (VPABSDrr VR512:$src)>;

-  Elena


-----Original Message-----
From: Cameron McInally [mailto:cameron.mcinally at nyu.edu]
Sent: Tuesday, December 24, 2013 18:32
To: Demikhovsky, Elena
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [PATCH][AVX512] Add intrinsics for Packed Absolute Value

Hi Elena,

Attached is an updated patch to handle masked packed absolute value. I modeled this after the conflict patterns and intrinsics.

Also, does GCC mention how they will handle zero-merging intrinsics?
It wasn't obvious to me looking at their documents.

Thanks,
Cameron


On Tue, Dec 24, 2013 at 9:53 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote:
> Hi Cameron,
>
> I'm looking at GCC intrinsics.
> I see
> __builtin_ia32_pabsq512_mask and
> __builtin_ia32_pabsd512_mask.
>
> I think we should be aligned with GCC.
>
>
> -  Elena
>
>
> -----Original Message-----
> From: Cameron McInally [mailto:cameron.mcinally at nyu.edu]
> Sent: Tuesday, December 24, 2013 16:45
> To: llvm-commits at cs.uiuc.edu
> Cc: Demikhovsky, Elena
> Subject: [PATCH][AVX512] Add intrinsics for Packed Absolute Value
>
> Hey guys,
>
> Attached is a patch to support AVX512 Packed Absolute Value intrinsics.
>
> Thanks,
> Cameron
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