[llvm] r197694 - Long doubles are required to be aligned to 128 bits and svr4 32 bits.

[dblaikie at gmail.com]

On Thu Dec 19 2013 at 2:57:01 PM, Rafael Espíndola <
rafael.espindola at gmail.com> wrote:

> ccing lvm-testresults at llvm.org as it is the listed admin.
>
> Is there a way to force configure to be run?
>

It's a rather annoying artifact of the way I have that builder setup - I'm
not sure of a better way to have the configure step execute conditionally
so we can get a real incremental build (if we run configure every time, it
invalidates the build and rebuilds everything... making the bot cycle time
rather long).

I just login to the buildbot & manually nuke the build tree when things
like this come up - which I've just done.

Sorry for the noise,
- David


>
> On 19 December 2013 17:54, Hal Finkel <hfinkel at anl.gov> wrote:
> > No, this error is likely caused because PowerPC does not appear in the
> list of targets with disassemblers. The web page says:
> >
> > 6. configure configure Release+Asserts skipped
> >
> > This is a problem. configure needs to be rerun to pick up the fact that
> PPC now has a disassembler.
> >
> >  -Hal
> >
> > ----- Original Message -----
> >> From: dblaikie at gmail.com
> >> To: "Rafael Espindola" <rafael.espindola at gmail.com>,
> llvm-commits at cs.uiuc.edu
> >> Sent: Thursday, December 19, 2013 4:49:42 PM
> >> Subject: [llvm] r197694 - Long doubles are required to be aligned to
> 128 bits and svr4 32 bits.
> >>
> >>
> >> I'm going to guess this commit is causing these test failures, maybe?
> >>
> >> http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-
> gdb-75/builds/11517
> >>
> >>
> >>     1. LLVM::ppc64-encoding-bookII.txt
> >>     2. LLVM::ppc64-encoding-bookIII.txt
> >>     3. LLVM::ppc64-encoding-ext.txt
> >>     4. LLVM::ppc64-encoding-fp.txt
> >>     5. LLVM::ppc64-encoding-vmx.txt
> >>     6. LLVM::ppc64-operands.txt
> >>     7. LLVM::ppc64-encoding.txt
> >>
> >>
> >> On Thu Dec 19 2013 at 8:29:54 AM, Rafael Espindola <
> >> rafael.espindola at gmail.com > wrote:
> >>
> >> Author: rafael
> >> Date: Thu Dec 19 10:23:59 2013
> >> New Revision: 197694
> >>
> >> URL: http://llvm.org/viewvc/llvm- project?rev=197694&view=rev
> >> Log:
> >> Long doubles are required to be aligned to 128 bits and svr4 32 bits.
> >>
> >> Clang was already getting this right.
> >>
> >> Modified:
> >> llvm/trunk/lib/Target/PowerPC/ PPCTargetMachine.cpp
> >>
> >> Modified: llvm/trunk/lib/Target/PowerPC/ PPCTargetMachine.cpp
> >> URL: http://llvm.org/viewvc/llvm- project/llvm/trunk/lib/Target/
> >> PowerPC/PPCTargetMachine.cpp? rev=197694&r1=197693&r2=
> >> 197694&view=diff
> >> ============================== ==============================
> >> ==================
> >> --- llvm/trunk/lib/Target/PowerPC/ PPCTargetMachine.cpp (original)
> >> +++ llvm/trunk/lib/Target/PowerPC/ PPCTargetMachine.cpp Thu Dec 19
> >> 10:23:59 2013
> >> @@ -52,10 +52,6 @@ static std::string getDataLayoutString(c
> >> else
> >> Ret += "-f64:32:64";
> >>
> >> - // Set support for 128 floats depending on the ABI.
> >> - if (!ST.isPPC64() && ST.isSVR4ABI())
> >> - Ret += "-f128:64:128";
> >> -
> >> // PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
> >> if (ST.isPPC64())
> >> Ret += "-n32:64";
> >>
> >>
> >> ______________________________ _________________
> >> llvm-commits mailing list
> >> llvm-commits at cs.uiuc.edu
> >> http://lists.cs.uiuc.edu/ mailman/listinfo/llvm-commits
> >>
> >> _______________________________________________
> >> llvm-commits mailing list
> >> llvm-commits at cs.uiuc.edu
> >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> >>
> >
> > --
> > Hal Finkel
> > Assistant Computational Scientist
> > Leadership Computing Facility
> > Argonne National Laboratory
>
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