[llvm] r197712 - [X86][fast-isel] Fix select lowering.

Eric Christopher echristo at gmail.com
Thu Dec 19 11:33:20 PST 2013


Nice. :)

On Thu Dec 19 2013 at 10:37:41 AM, Quentin Colombet <qcolombet at apple.com>
wrote:

> Author: qcolombet
> Date: Thu Dec 19 12:32:04 2013
> New Revision: 197712
>
> URL: http://llvm.org/viewvc/llvm-project?rev=197712&view=rev
> Log:
> [X86][fast-isel] Fix select lowering.
> The condition in selects is supposed to be i1.
> Make sure we are just reading the less significant bit
> of the 8 bits width value to match this constraint.
>
> <rdar://problem/15651765>
>
> Added:
>     llvm/trunk/test/CodeGen/X86/fast-isel-select.ll
> Modified:
>     llvm/trunk/lib/Target/X86/X86FastISel.cpp
>
> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> X86/X86FastISel.cpp?rev=197712&r1=197711&r2=197712&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Thu Dec 19 12:32:04 2013
> @@ -1508,8 +1508,13 @@ bool X86FastISel::X86SelectSelect(const
>    unsigned Op2Reg = getRegForValue(I->getOperand(2));
>    if (Op2Reg == 0) return false;
>
> -  BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8rr))
> -    .addReg(Op0Reg).addReg(Op0Reg);
> +  // Selects operate on i1, however, Op0Reg is 8 bits width and may
> contain
> +  // garbage. Indeed, only the less significant bit is supposed to be
> accurate.
> +  // If we read more than the lsb, we may see non-zero values whereas lsb
> +  // is zero. Therefore, we have to truncate Op0Reg to i1 for the select.
> +  // This is acheived by performing TEST against 1.
> +  BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8ri))
> +    .addReg(Op0Reg).addImm(1);
>    unsigned ResultReg = createResultReg(RC);
>    BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg)
>      .addReg(Op1Reg).addReg(Op2Reg);
>
> Added: llvm/trunk/test/CodeGen/X86/fast-isel-select.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/X86/fast-isel-select.ll?rev=197712&view=auto
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/X86/fast-isel-select.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/fast-isel-select.ll Thu Dec 19 12:32:04
> 2013
> @@ -0,0 +1,16 @@
> +; RUN: llc -mtriple x86_64-apple-darwin -O0 -o - < %s | FileCheck %s
> +; Make sure we only use the less significant bit of the value that feeds
> the
> +; select. Otherwise, we may account for a non-zero value whereas the
> +; lsb is zero.
> +; <rdar://problem/15651765>
> +
> +; CHECK-LABEL: fastisel_select:
> +; CHECK: subb {{%[a-z0-9]+}}, [[RES:%[a-z0-9]+]]
> +; CHECK: testb $1, [[RES]]
> +; CHECK: cmovel
> +define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) {
> +  %shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766
> +  %counter_diff1345 = select i1 %shuffleInternal15257_8932, i32
> 1204476887, i32 0
> +  ret i32 %counter_diff1345
> +}
> +
>
>
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