[llvm] r197482 - AVX-512: Added implementation of CONCAT_VECTORS for v8i1 vectors (by Alexey Bader).
Elena Demikhovsky
elena.demikhovsky at intel.com
Tue Dec 17 00:33:16 PST 2013
Author: delena
Date: Tue Dec 17 02:33:15 2013
New Revision: 197482
URL: http://llvm.org/viewvc/llvm-project?rev=197482&view=rev
Log:
AVX-512: Added implementation of CONCAT_VECTORS for v8i1 vectors (by Alexey Bader).
Added implementation of "truncate" from integer type (i64/i32/i16/i8) to i1.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=197482&r1=197481&r2=197482&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Dec 17 02:33:15 2013
@@ -1356,7 +1356,7 @@ void X86TargetLowering::resetOperationAc
setOperationAction(ISD::FP_ROUND, MVT::v8f32, Legal);
setOperationAction(ISD::FP_EXTEND, MVT::v8f32, Legal);
- setOperationAction(ISD::TRUNCATE, MVT::i1, Legal);
+ setOperationAction(ISD::TRUNCATE, MVT::i1, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v16i8, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v8i32, Custom);
setOperationAction(ISD::TRUNCATE, MVT::v8i1, Custom);
@@ -1374,6 +1374,7 @@ void X86TargetLowering::resetOperationAc
setOperationAction(ISD::CONCAT_VECTORS, MVT::v16f32, Custom);
setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i32, Custom);
setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i1, Custom);
+ setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i1, Legal);
setOperationAction(ISD::SETCC, MVT::v16i1, Custom);
setOperationAction(ISD::SETCC, MVT::v8i1, Custom);
@@ -9066,6 +9067,17 @@ SDValue X86TargetLowering::LowerTRUNCATE
MVT VT = Op.getSimpleValueType();
SDValue In = Op.getOperand(0);
MVT InVT = In.getSimpleValueType();
+
+ if (VT == MVT::i1) {
+ assert((InVT.isInteger() && (InVT.getSizeInBits() <= 64)) &&
+ "Invalid scalar TRUNCATE operation");
+ In = DAG.getNode(ISD::AND, DL, InVT, In, DAG.getConstant(1, InVT));
+ if (InVT.getSizeInBits() == 64)
+ In = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::i32, In);
+ else if (InVT.getSizeInBits() < 32)
+ In = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, In);
+ return DAG.getNode(X86ISD::TRUNC, DL, VT, In);
+ }
assert(VT.getVectorNumElements() == InVT.getVectorNumElements() &&
"Invalid TRUNCATE operation");
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=197482&r1=197481&r2=197482&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Dec 17 02:33:15 2013
@@ -260,6 +260,9 @@ namespace llvm {
// VTRUNC - Vector integer truncate.
VTRUNC,
+ // TRUNC - Integer truncate
+ TRUNC,
+
// VTRUNC - Vector integer truncate with mask.
VTRUNCM,
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=197482&r1=197481&r2=197482&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Tue Dec 17 02:33:15 2013
@@ -908,6 +908,9 @@ let Predicates = [HasAVX512] in {
def : Pat<(v8i1 (load addr:$src)),
(COPY_TO_REGCLASS (KMOVWkm addr:$src), VK8)>;
+
+ def : Pat<(i1 (X86trunc (i32 GR32:$src))),
+ (COPY_TO_REGCLASS (KMOVWkr $src), VK1)>;
}
// With AVX-512 only, 8-bit mask is promoted to 16-bit mask.
let Predicates = [HasAVX512] in {
@@ -1051,6 +1054,10 @@ multiclass avx512_mask_unpck_bw<bits<8>
}
defm KUNPCK : avx512_mask_unpck_bw<0x4b, "kunpck">;
+def : Pat<(v16i1 (concat_vectors (v8i1 VK8:$src1), (v8i1 VK8:$src2))),
+ (KUNPCKBWrr (COPY_TO_REGCLASS VK8:$src2, VK16),
+ (COPY_TO_REGCLASS VK8:$src1, VK16))>;
+
multiclass avx512_mask_unpck_int<string IntName, string InstName> {
let Predicates = [HasAVX512] in
Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=197482&r1=197481&r2=197482&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Tue Dec 17 02:33:15 2013
@@ -108,6 +108,9 @@ def X86vsext : SDNode<"X86ISD::VSEXT",
def X86vtrunc : SDNode<"X86ISD::VTRUNC",
SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
SDTCisInt<0>, SDTCisInt<1>]>>;
+def X86trunc : SDNode<"X86ISD::TRUNC",
+ SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>]>>;
+
def X86vtruncm : SDNode<"X86ISD::VTRUNCM",
SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
SDTCisInt<0>, SDTCisInt<1>,
Modified: llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll?rev=197482&r1=197481&r2=197482&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll Tue Dec 17 02:33:15 2013
@@ -111,3 +111,14 @@ define <8 x i32> @test11_unsigned(<8 x i
%max = select <8 x i1> %mask, <8 x i32> %x, <8 x i32> %y
ret <8 x i32> %max
}
+
+; CHECK-LABEL: test12
+; CHECK: vpcmpeqq %zmm2, %zmm0, [[LO:%k[0-7]]]
+; CHECK: vpcmpeqq %zmm3, %zmm1, [[HI:%k[0-7]]]
+; CHECK: kunpckbw [[LO]], [[HI]], {{%k[0-7]}}
+
+define i16 @test12(<16 x i64> %a, <16 x i64> %b) nounwind {
+ %res = icmp eq <16 x i64> %a, %b
+ %res1 = bitcast <16 x i1> %res to i16
+ ret i16 %res1
+}
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