[PATCH] [PATCH][AArch64] Pattern match should check the range of an immediate value.

[Hao Liu]

Hi t.p.northover,

Hi Tim and reviewers,

In AArch64 backend DAG selection phase, currently some pattern matches don't check the range of an immediate value. This may generate incorrect assembly code. 
For example, the following IR:
      %vsqshrn1 = call <1 x i8> @llvm.aarch64.neon.vsqshrn.v1i8(<1 x i16> %vsqshrn, i32 15)
will be selected into an instructions:
      sqshrn {{b[0-9]+}}, {{h[0-9]+}}, #15
But the range of a SQSHRN for a register B and a register H should only have an immediate value in range [1, 8].
This patch fixed it. The solution is simplly replace "imm:" with a ImmLeaf having range check in patterns.

Another related problem is that the range check for Scalar Narrow Shift in Clang is incorrect. The range is too wide. 
For example, currently the immediate value of vqshrnh_n_s16 is [1,16], which should be [1, 8]
This patch fix it by narrowing the range for scalar narrow shift.

Reveiw please.

Thanks,
-Hao


http://llvm-reviews.chandlerc.com/D2284

Files:
  lib/Target/AArch64/AArch64InstrNEON.td
  test/CodeGen/AArch64/neon-diagnostics.ll
  test/CodeGen/AArch64/neon-scalar-cvt.ll
  test/CodeGen/AArch64/neon-scalar-shift-imm.ll
  tools/clang/include/clang/Basic/arm_neon.td
  tools/clang/lib/CodeGen/CGBuiltin.cpp
  tools/clang/test/CodeGen/aarch64-neon-intrinsics.c
  tools/clang/utils/TableGen/NeonEmitter.cpp
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