[PATCH] Enable FeatureMP for Cortex-A5 by default

James Molloy james at jamesmolloy.co.uk
Mon Nov 25 03:55:49 PST 2013


Hi Oliver,

Looks like you forgot to CC both lists in your reply - re-cc'ing them.

LGTM!

Cheers,

James


On 22 November 2013 15:06, Oliver Stannard <oliver.stannard at arm.com> wrote:

> Hi James,
>
>
>
> I have attached an updated clang patch which removes the whitespace diff.
>
>
>
> The +d16 is because the default for Cortex-A5 is VFPv4 and NEON, but
> VFPv4-D16 is another option. Just using -mattr=-neon would result in VFPv4
> with 32 D registers, which is not valid (for Cortex-A5). Reference:
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0434b/BABDBBIH.html
>
>
>
> Oliver
>
>
>
> *From:* mankeyrabbit at gmail.com [mailto:mankeyrabbit at gmail.com] *On Behalf
> Of *James Molloy
> *Sent:* 22 November 2013 14:27
> *To:* Oliver Stannard
> *Cc:* cfe-commits at cs.uiuc.edu; llvm-commits
> *Subject:* Re: [PATCH] Enable FeatureMP for Cortex-A5 by default
>
>
>
> Hi Oliver,
>
>
>
> @@ -94,7 +94,6 @@
>
>  // RUN: %clang -target arm -mthumb -mcpu=cortex-a15 -mhwdiv=none -x c -E
> -dM %s -o - | FileCheck --check-prefix=DEFAULTHWDIV-NONEHWDIV-THUMB %s
>
>  // DEFAULTHWDIV-NONEHWDIV-THUMB-NOT:#define __ARM_ARCH_EXT_IDIV__
>
>
>
> -
>
>  // Check that -mfpu works properly for Cortex-A7 (enabled by default).
>
>
>
> Looks like a whitespace diff here.
>
>
>
> +; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5
> -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
>
>
>
> Why is there the extra +d16?
>
>
>
> Cheers,
>
>
>
> James
>
>
>
> On 22 November 2013 14:19, Oliver Stannard <oliver.stannard at arm.com>
> wrote:
>
> Hi all,
>
> These patches enables FeatureMP by default for Cortex-A5 processors, and
> test that the correct build attributes are emitted when compiling for
> Cortex-A5.
>
> The reason for this is that the majority of developers using LLVM for
> Cortex-A5 will be developing "application" style software, where most
> Cortex-A5 CPUs will be Cortex-A5MP. Those developers using LLVM for
> deeply-embedded software may still need to target Cortex-A5 without the MP
> extension, but are also more likely to know the exact features of the
> hardware they are targeting, and so set the enabled features correctly. The
> same logic applies equally well to the default enabling of optional
> features
> of other Cortex-A* cores.
>
> Oliver
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
>
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