[PATCH] [AArch64]Implement 128 bit register copy with NEON.
t.p.northover at gmail.com
Mon Nov 25 02:25:30 PST 2013
This is definitely a good idea (the existing "solution" was an
appalling hack), but I think the instructions chosen are sub-optimal.
ARM has designated the instruction "ORR vD.16b, vN.16b, vN.16b" as the
official 128-bit move instruction.
CPU designers are likely to optimise around this (for example it might
not even make it to the ALU, and be handled directly by the register
renaming hardware) so that's what LLVM should be generating, I think.
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