[llvm] r195423 - Revert last change by haoliu because of buildbot failure.

Hao Liu haoliuts at gmail.com
Sun Nov 24 17:52:38 PST 2013


Oh, it breaks nothing.

There was a misinformation email by buildbot:
http://lab.llvm.org:8011/builders/lldb-x86_64-darwin12/builds/7174,  which
told me that my commit causing a build failure.

I thought it was my fault, because there is only me on the blame list. So I
reverted it.

Then,  I tried my patch again and couldn't find any build failures. So I
recommitted it in r195432
http://llvm.org/viewvc/llvm-project?view=revision&revision=195432. And I
never received any buildbot failure email.

It seems that email is incorrect. Now this patch is in trunk.

Thanks,
-Hao



2013/11/22 NAKAMURA Takumi <geek4civic at gmail.com>

> I don't understand what you broke. Lemme know, please?
>
> 2013/11/22 Hao Liu <Hao.Liu at arm.com>:
> > Author: haoliu
> > Date: Fri Nov 22 02:34:54 2013
> > New Revision: 195423
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=195423&view=rev
> > Log:
> > Revert last change by haoliu because of buildbot failure.
> >
> > Modified:
> >     llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.td
> >     llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
> >     llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
> >     llvm/trunk/lib/Target/AArch64/Utils/AArch64BaseInfo.h
> >
> > Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.td?rev=195423&r1=195422&r2=195423&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.td (original)
> > +++ llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.td Fri Nov 22
> 02:34:54 2013
> > @@ -261,12 +261,12 @@ multiclass VectorList_operands<string PR
> >      let Name = PREFIX # LAYOUT # Count;
> >      let RenderMethod = "addVectorListOperands";
> >      let PredicateMethod =
> > -        "isVectorList<A64Layout::VL_" # LAYOUT # ", " # Count # ">";
> > +        "isVectorList<A64Layout::_" # LAYOUT # ", " # Count # ">";
> >      let ParserMethod = "ParseVectorList";
> >    }
> >
> >    def _operand : RegisterOperand<RegList,
> > -        "printVectorList<A64Layout::VL_" # LAYOUT # ", " # Count # ">">
> {
> > +        "printVectorList<A64Layout::_" # LAYOUT # ", " # Count # ">"> {
> >      let ParserMatchClass =
> >        !cast<AsmOperandClass>(PREFIX # LAYOUT # "_asmoperand");
> >    }
> >
> > Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=195423&r1=195422&r2=195423&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
> (original)
> > +++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Fri Nov
> 22 02:34:54 2013
> > @@ -2066,7 +2066,7 @@ AArch64AsmParser::OperandMatchResultTy A
> >
> >    A64Layout::VectorLayout Layout = A64StringToVectorLayout(LayoutStr);
> >    if (Count > 1) { // If count > 1, create vector list using super
> register.
> > -    bool IsVec64 = (Layout < A64Layout::VL_16B);
> > +    bool IsVec64 = (Layout < A64Layout::_16B);
> >      static unsigned SupRegIDs[3][2] = {
> >        { AArch64::QPairRegClassID, AArch64::DPairRegClassID },
> >        { AArch64::QTripleRegClassID, AArch64::DTripleRegClassID },
> > @@ -2084,10 +2084,10 @@ AArch64AsmParser::OperandMatchResultTy A
> >    if (Parser.getTok().is(AsmToken::LBrac)) {
> >      uint32_t NumLanes = 0;
> >      switch(Layout) {
> > -    case A64Layout::VL_B : NumLanes = 16; break;
> > -    case A64Layout::VL_H : NumLanes = 8; break;
> > -    case A64Layout::VL_S : NumLanes = 4; break;
> > -    case A64Layout::VL_D : NumLanes = 2; break;
> > +    case A64Layout::_B : NumLanes = 16; break;
> > +    case A64Layout::_H : NumLanes = 8; break;
> > +    case A64Layout::_S : NumLanes = 4; break;
> > +    case A64Layout::_D : NumLanes = 2; break;
> >      default:
> >        SMLoc Loc = getLexer().getLoc();
> >        Error(Loc, "expected comma before next operand");
> >
> > Modified:
> llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp?rev=195423&r1=195422&r2=195423&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
> (original)
> > +++ llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp Fri
> Nov 22 02:34:54 2013
> > @@ -521,7 +521,7 @@ void AArch64InstPrinter::printVectorList
> >    std::string LayoutStr = A64VectorLayoutToString(Layout);
> >    O << "{";
> >    if (Count > 1) { // Print sub registers separately
> > -    bool IsVec64 = (Layout < A64Layout::VL_16B);
> > +    bool IsVec64 = (Layout < A64Layout::_16B);
> >      unsigned SubRegIdx = IsVec64 ? AArch64::dsub_0 : AArch64::qsub_0;
> >      for (unsigned I = 0; I < Count; I++) {
> >        std::string Name = getRegisterName(MRI.getSubReg(Reg,
> SubRegIdx++));
> >
> > Modified: llvm/trunk/lib/Target/AArch64/Utils/AArch64BaseInfo.h
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/Utils/AArch64BaseInfo.h?rev=195423&r1=195422&r2=195423&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/AArch64/Utils/AArch64BaseInfo.h (original)
> > +++ llvm/trunk/lib/Target/AArch64/Utils/AArch64BaseInfo.h Fri Nov 22
> 02:34:54 2013
> > @@ -309,40 +309,40 @@ namespace A64SE {
> >  namespace A64Layout {
> >      enum VectorLayout {
> >          Invalid = -1,
> > -        VL_8B,
> > -        VL_4H,
> > -        VL_2S,
> > -        VL_1D,
> > +        _8B,
> > +        _4H,
> > +        _2S,
> > +        _1D,
> >
> > -        VL_16B,
> > -        VL_8H,
> > -        VL_4S,
> > -        VL_2D,
> > +        _16B,
> > +        _8H,
> > +        _4S,
> > +        _2D,
> >
> >          // Bare layout for the 128-bit vector
> >          // (only show ".b", ".h", ".s", ".d" without vector number)
> > -        VL_B,
> > -        VL_H,
> > -        VL_S,
> > -        VL_D
> > +        _B,
> > +        _H,
> > +        _S,
> > +        _D
> >      };
> >  }
> >
> >  inline static const char *
> >  A64VectorLayoutToString(A64Layout::VectorLayout Layout) {
> >    switch (Layout) {
> > -  case A64Layout::VL_8B:  return ".8b";
> > -  case A64Layout::VL_4H:  return ".4h";
> > -  case A64Layout::VL_2S:  return ".2s";
> > -  case A64Layout::VL_1D:  return ".1d";
> > -  case A64Layout::VL_16B:  return ".16b";
> > -  case A64Layout::VL_8H:  return ".8h";
> > -  case A64Layout::VL_4S:  return ".4s";
> > -  case A64Layout::VL_2D:  return ".2d";
> > -  case A64Layout::VL_B:  return ".b";
> > -  case A64Layout::VL_H:  return ".h";
> > -  case A64Layout::VL_S:  return ".s";
> > -  case A64Layout::VL_D:  return ".d";
> > +  case A64Layout::_8B:  return ".8b";
> > +  case A64Layout::_4H:  return ".4h";
> > +  case A64Layout::_2S:  return ".2s";
> > +  case A64Layout::_1D:  return ".1d";
> > +  case A64Layout::_16B:  return ".16b";
> > +  case A64Layout::_8H:  return ".8h";
> > +  case A64Layout::_4S:  return ".4s";
> > +  case A64Layout::_2D:  return ".2d";
> > +  case A64Layout::_B:  return ".b";
> > +  case A64Layout::_H:  return ".h";
> > +  case A64Layout::_S:  return ".s";
> > +  case A64Layout::_D:  return ".d";
> >    default: llvm_unreachable("Unknown Vector Layout");
> >    }
> >  }
> > @@ -350,18 +350,18 @@ A64VectorLayoutToString(A64Layout::Vecto
> >  inline static A64Layout::VectorLayout
> >  A64StringToVectorLayout(StringRef LayoutStr) {
> >    return StringSwitch<A64Layout::VectorLayout>(LayoutStr)
> > -             .Case(".8b", A64Layout::VL_8B)
> > -             .Case(".4h", A64Layout::VL_4H)
> > -             .Case(".2s", A64Layout::VL_2S)
> > -             .Case(".1d", A64Layout::VL_1D)
> > -             .Case(".16b", A64Layout::VL_16B)
> > -             .Case(".8h", A64Layout::VL_8H)
> > -             .Case(".4s", A64Layout::VL_4S)
> > -             .Case(".2d", A64Layout::VL_2D)
> > -             .Case(".b", A64Layout::VL_B)
> > -             .Case(".h", A64Layout::VL_H)
> > -             .Case(".s", A64Layout::VL_S)
> > -             .Case(".d", A64Layout::VL_D)
> > +             .Case(".8b", A64Layout::_8B)
> > +             .Case(".4h", A64Layout::_4H)
> > +             .Case(".2s", A64Layout::_2S)
> > +             .Case(".1d", A64Layout::_1D)
> > +             .Case(".16b", A64Layout::_16B)
> > +             .Case(".8h", A64Layout::_8H)
> > +             .Case(".4s", A64Layout::_4S)
> > +             .Case(".2d", A64Layout::_2D)
> > +             .Case(".b", A64Layout::_B)
> > +             .Case(".h", A64Layout::_H)
> > +             .Case(".s", A64Layout::_S)
> > +             .Case(".d", A64Layout::_D)
> >               .Default(A64Layout::Invalid);
> >  }
> >
> >
> >
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