[llvm] r195448 - Add support for Cortex-A12.
Richard Barton
richard.barton at arm.com
Fri Nov 22 03:53:16 PST 2013
Author: rbarton
Date: Fri Nov 22 05:53:16 2013
New Revision: 195448
URL: http://llvm.org/viewvc/llvm-project?rev=195448&view=rev
Log:
Add support for Cortex-A12.
Patch by Oliver Stannard!
Modified:
llvm/trunk/lib/Target/ARM/ARM.td
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
llvm/trunk/test/CodeGen/ARM/build-attributes.ll
Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=195448&r1=195447&r2=195448&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Fri Nov 22 05:53:16 2013
@@ -205,6 +205,15 @@ def ProcSwift : SubtargetFeature<"swif
FeatureHWDivARM, FeatureAvoidPartialCPSR,
FeatureAvoidMOVsShOp,
FeatureHasSlowFPVMLx, FeatureTrustZone]>;
+def ProcA12 : SubtargetFeature<"a12", "ARMProcFamily", "CortexA12",
+ "Cortex-A12 ARM processors",
+ [FeatureVMLxForwarding,
+ FeatureT2XtPk, FeatureVFP4,
+ FeatureHWDiv, FeatureHWDivARM,
+ FeatureAvoidPartialCPSR,
+ FeatureVirtualization,
+ FeatureTrustZone]>;
+
// FIXME: It has not been determined if A15 has these features.
def ProcA15 : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
@@ -319,11 +328,19 @@ def : ProcessorModel<"cortex-a9-mp", Cor
[ProcA9, HasV7Ops, FeatureNEON, FeatureDB,
FeatureDSPThumb2, FeatureMP,
FeatureHasRAS, FeatureAClass]>;
+
+// FIXME: A12 has currently the same Schedule model as A9
+def : ProcessorModel<"cortex-a12", CortexA9Model,
+ [ProcA12, HasV7Ops, FeatureNEON, FeatureDB,
+ FeatureDSPThumb2, FeatureMP,
+ FeatureHasRAS, FeatureAClass]>;
+
// FIXME: A15 has currently the same ProcessorModel as A9.
def : ProcessorModel<"cortex-a15", CortexA9Model,
[ProcA15, HasV7Ops, FeatureNEON, FeatureDB,
FeatureDSPThumb2, FeatureHasRAS,
FeatureAClass]>;
+
// FIXME: R5 has currently the same ProcessorModel as A8.
def : ProcessorModel<"cortex-r5", CortexA8Model,
[ProcR5, HasV7Ops, FeatureDB,
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=195448&r1=195447&r2=195448&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Fri Nov 22 05:53:16 2013
@@ -31,8 +31,8 @@ class TargetOptions;
class ARMSubtarget : public ARMGenSubtargetInfo {
protected:
enum ARMProcFamilyEnum {
- Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA15, CortexR5,
- Swift, CortexA53, CortexA57
+ Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
+ CortexR5, Swift, CortexA53, CortexA57
};
enum ARMProcClassEnum {
None, AClass, RClass, MClass
Modified: llvm/trunk/test/CodeGen/ARM/build-attributes.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/build-attributes.ll?rev=195448&r1=195447&r2=195448&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/build-attributes.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/build-attributes.ll Fri Nov 22 05:53:16 2013
@@ -14,6 +14,8 @@
; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
+; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
+; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9-mp | FileCheck %s --check-prefix=CORTEX-A9-MP
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
@@ -238,6 +240,36 @@
; CORTEX-A9-MP: .eabi_attribute 42, 1
; CORTEX-A9-MP: .eabi_attribute 68, 1
+; CORTEX-A12-DEFAULT: .cpu cortex-a12
+; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10
+; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65
+; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1
+; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2
+; CORTEX-A12-DEFAULT: .fpu neon-vfpv4
+; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1
+; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1
+; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3
+; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1
+; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1
+; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1
+; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2
+; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3
+
+; CORTEX-A12-NOFPU: .cpu cortex-a12
+; CORTEX-A12-NOFPU: .eabi_attribute 6, 10
+; CORTEX-A12-NOFPU: .eabi_attribute 7, 65
+; CORTEX-A12-NOFPU: .eabi_attribute 8, 1
+; CORTEX-A12-NOFPU: .eabi_attribute 9, 2
+; CORTEX-A12-NOFPU-NOT: .fpu
+; CORTEX-A12-NOFPU: .eabi_attribute 20, 1
+; CORTEX-A12-NOFPU: .eabi_attribute 21, 1
+; CORTEX-A12-NOFPU: .eabi_attribute 23, 3
+; CORTEX-A12-NOFPU: .eabi_attribute 24, 1
+; CORTEX-A12-NOFPU: .eabi_attribute 25, 1
+; CORTEX-A12-NOFPU: .eabi_attribute 42, 1
+; CORTEX-A12-NOFPU: .eabi_attribute 44, 2
+; CORTEX-A12-NOFPU: .eabi_attribute 68, 3
+
; CORTEX-A15: .cpu cortex-a15
; CORTEX-A15: .eabi_attribute 6, 10
; CORTEX-A15: .eabi_attribute 7, 65
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