[llvm] r195399 - R600: Implement TargetInstrInfo::isLegalToSplitMBBAt()

Tom Stellard tom at stellard.net
Thu Nov 21 20:28:58 PST 2013


Hi Bill,

Could you merge this patch into the 3.4 branch?  I am the code owner and
I approve this patch.

Thanks,
Tom

On Fri, Nov 22, 2013 at 12:41:09AM -0000, Tom Stellard wrote:
> Author: tstellar
> Date: Thu Nov 21 18:41:08 2013
> New Revision: 195399
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=195399&view=rev
> Log:
> R600: Implement TargetInstrInfo::isLegalToSplitMBBAt()
> 
> Splitting a basic block will create a new ALU clause, so we need to make
> sure we aren't moving uses of registers that are local to their
> current clause into a new one.
> 
> I had a test case for this, but unfortunately unrelated schedule changes
> invalidated it, and I wasn't been able to come up with another one.
> 
> NOTE: This is a candidate for the 3.4 branch.
> 
> Modified:
>     llvm/trunk/lib/Target/R600/R600InstrInfo.cpp
>     llvm/trunk/lib/Target/R600/R600InstrInfo.h
> 
> Modified: llvm/trunk/lib/Target/R600/R600InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600InstrInfo.cpp?rev=195399&r1=195398&r2=195399&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/R600InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/R600/R600InstrInfo.cpp Thu Nov 21 18:41:08 2013
> @@ -77,6 +77,18 @@ R600InstrInfo::copyPhysReg(MachineBasicB
>    }
>  }
>  
> +/// \returns true if \p MBBI can be moved into a new basic.
> +bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
> +                                       MachineBasicBlock::iterator MBBI) const {
> +  for (MachineInstr::const_mop_iterator I = MBBI->operands_begin(),
> +                                        E = MBBI->operands_end(); I != E; ++I) {
> +    if (I->isReg() && !TargetRegisterInfo::isVirtualRegister(I->getReg()) &&
> +        I->isUse() && RI.isPhysRegLiveAcrossClauses(I->getReg()))
> +      return false;
> +  }
> +  return true;
> +}
> +
>  unsigned R600InstrInfo::getIEQOpcode() const {
>    return AMDGPU::SETE_INT;
>  }
> 
> Modified: llvm/trunk/lib/Target/R600/R600InstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600InstrInfo.h?rev=195399&r1=195398&r2=195399&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/R600InstrInfo.h (original)
> +++ llvm/trunk/lib/Target/R600/R600InstrInfo.h Thu Nov 21 18:41:08 2013
> @@ -55,6 +55,8 @@ namespace llvm {
>                             MachineBasicBlock::iterator MI, DebugLoc DL,
>                             unsigned DestReg, unsigned SrcReg,
>                             bool KillSrc) const;
> +  bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
> +                           MachineBasicBlock::iterator MBBI) const;
>  
>    bool isTrig(const MachineInstr &MI) const;
>    bool isPlaceHolderOpcode(unsigned opcode) const;
> 
> 
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