[PATCH] R600/SI: Add comments for number of used registers.
Tom Stellard
tom at stellard.net
Mon Nov 18 10:36:18 PST 2013
On Sun, Nov 17, 2013 at 07:35:33PM -0800, Matt Arsenault wrote:
> Use EmitRawText to avoid indentation
>
> http://llvm-reviews.chandlerc.com/D2206
>
> CHANGE SINCE LAST DIFF
> http://llvm-reviews.chandlerc.com/D2206?vs=5616&id=5617#toc
>
> Files:
> lib/Target/R600/AMDGPUAsmPrinter.cpp
> lib/Target/R600/AMDGPUAsmPrinter.h
>
> Index: lib/Target/R600/AMDGPUAsmPrinter.cpp
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.cpp
> +++ lib/Target/R600/AMDGPUAsmPrinter.cpp
> @@ -46,8 +46,7 @@
> }
>
> AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
> - : AsmPrinter(TM, Streamer)
> -{
> + : AsmPrinter(TM, Streamer) {
> DisasmEnabled = TM.getSubtarget<AMDGPUSubtarget>().dumpCode() &&
> ! Streamer.hasRawTextSupport();
> }
> @@ -56,6 +55,7 @@
> /// the call to EmitFunctionHeader(), which the MCPureStreamer can't handle.
> bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
> SetupMachineFunction(MF);
> +
> if (OutStreamer.hasRawTextSupport()) {
> OutStreamer.EmitRawText("@" + MF.getName() + ":");
> }
> @@ -65,9 +65,12 @@
> ELF::SHT_PROGBITS, 0,
> SectionKind::getReadOnly());
> OutStreamer.SwitchSection(ConfigSection);
> +
> const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
> + SIProgramInfo KernelInfo;
> if (STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
> - EmitProgramInfoSI(MF);
> + findNumUsedRegistersSI(MF, KernelInfo.NumSGPR, KernelInfo.NumVGPR);
> + EmitProgramInfoSI(MF, KernelInfo);
> } else {
> EmitProgramInfoR600(MF);
> }
> @@ -79,6 +82,14 @@
> OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
> EmitFunctionBody();
>
> + if (isVerbose() && OutStreamer.hasRawTextSupport()) {
> + // TODO: How can we prevent these from being indented?
> + OutStreamer.EmitRawText(
> + Twine("; Kernel info:\n") +
> + "; Max SGPR: " + Twine(KernelInfo.NumSGPR) + "\n" +
> + "; Max VGPR: " + Twine(KernelInfo.NumVGPR) + "\n\n\n");
> + }
> +
Can you stick this in an ELF section so it can be accessed from Mesa?
The section name should be .AMDGPU.csdata and we should try to use the
same formatting as the proprietary driver:
NumVgprs = 3;
NumSgprs = 13;
Getting the whitespace correct is not important.
-Tom
> if (STM.dumpCode()) {
> #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
> MF.dump();
> @@ -166,8 +177,9 @@
> }
> }
>
> -void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF) {
> - const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
> +void AMDGPUAsmPrinter::findNumUsedRegistersSI(MachineFunction &MF,
> + unsigned &NumSGPR,
> + unsigned &NumVGPR) const {
> unsigned MaxSGPR = 0;
> unsigned MaxVGPR = 0;
> bool VCCUsed = false;
> @@ -252,10 +264,24 @@
> }
> }
> }
> - if (VCCUsed) {
> +
> + if (VCCUsed)
> MaxSGPR += 2;
> - }
> - SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
> +
> + NumSGPR = MaxSGPR;
> + NumVGPR = MaxVGPR;
> +}
> +
> +void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &Out,
> + MachineFunction &MF) const {
> + findNumUsedRegistersSI(MF, Out.NumSGPR, Out.NumVGPR);
> +}
> +
> +void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF,
> + const SIProgramInfo &KernelInfo) {
> + const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
> +
> + SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
> unsigned RsrcReg;
> switch (MFI->ShaderType) {
> default: // Fall through
> @@ -266,7 +292,8 @@
> }
>
> OutStreamer.EmitIntValue(RsrcReg, 4);
> - OutStreamer.EmitIntValue(S_00B028_VGPRS(MaxVGPR / 4) | S_00B028_SGPRS(MaxSGPR / 8), 4);
> + OutStreamer.EmitIntValue(S_00B028_VGPRS(KernelInfo.NumVGPR / 4) |
> + S_00B028_SGPRS(KernelInfo.NumSGPR / 8), 4);
>
> unsigned LDSAlignShift;
> if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {
> Index: lib/Target/R600/AMDGPUAsmPrinter.h
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.h
> +++ lib/Target/R600/AMDGPUAsmPrinter.h
> @@ -22,6 +22,21 @@
> namespace llvm {
>
> class AMDGPUAsmPrinter : public AsmPrinter {
> +private:
> + struct SIProgramInfo {
> + unsigned NumSGPR;
> + unsigned NumVGPR;
> + };
> +
> + void getSIProgramInfo(SIProgramInfo &Out, MachineFunction &MF) const;
> + void findNumUsedRegistersSI(MachineFunction &MF,
> + unsigned &NumSGPR,
> + unsigned &NumVGPR) const;
> +
> + /// \brief Emit register usage information so that the GPU driver
> + /// can correctly setup the GPU state.
> + void EmitProgramInfoR600(MachineFunction &MF);
> + void EmitProgramInfoSI(MachineFunction &MF, const SIProgramInfo &KernelInfo);
>
> public:
> explicit AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer);
> @@ -32,11 +47,6 @@
> return "AMDGPU Assembly Printer";
> }
>
> - /// \brief Emit register usage information so that the GPU driver
> - /// can correctly setup the GPU state.
> - void EmitProgramInfoR600(MachineFunction &MF);
> - void EmitProgramInfoSI(MachineFunction &MF);
> -
> /// Implemented in AMDGPUMCInstLower.cpp
> virtual void EmitInstruction(const MachineInstr *MI);
> Index: lib/Target/R600/AMDGPUAsmPrinter.cpp
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.cpp
> +++ lib/Target/R600/AMDGPUAsmPrinter.cpp
> @@ -46,8 +46,7 @@
> }
>
> AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
> - : AsmPrinter(TM, Streamer)
> -{
> + : AsmPrinter(TM, Streamer) {
> DisasmEnabled = TM.getSubtarget<AMDGPUSubtarget>().dumpCode() &&
> ! Streamer.hasRawTextSupport();
> }
> @@ -56,6 +55,7 @@
> /// the call to EmitFunctionHeader(), which the MCPureStreamer can't handle.
> bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
> SetupMachineFunction(MF);
> +
> if (OutStreamer.hasRawTextSupport()) {
> OutStreamer.EmitRawText("@" + MF.getName() + ":");
> }
> @@ -65,9 +65,12 @@
> ELF::SHT_PROGBITS, 0,
> SectionKind::getReadOnly());
> OutStreamer.SwitchSection(ConfigSection);
> +
> const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
> + SIProgramInfo KernelInfo;
> if (STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
> - EmitProgramInfoSI(MF);
> + findNumUsedRegistersSI(MF, KernelInfo.NumSGPR, KernelInfo.NumVGPR);
> + EmitProgramInfoSI(MF, KernelInfo);
> } else {
> EmitProgramInfoR600(MF);
> }
> @@ -79,6 +82,14 @@
> OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
> EmitFunctionBody();
>
> + if (isVerbose() && OutStreamer.hasRawTextSupport()) {
> + // TODO: How can we prevent these from being indented?
> + OutStreamer.EmitRawText(
> + Twine("; Kernel info:\n") +
> + "; Max SGPR: " + Twine(KernelInfo.NumSGPR) + "\n" +
> + "; Max VGPR: " + Twine(KernelInfo.NumVGPR) + "\n\n\n");
> + }
> +
> if (STM.dumpCode()) {
> #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
> MF.dump();
> @@ -166,8 +177,9 @@
> }
> }
>
> -void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF) {
> - const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
> +void AMDGPUAsmPrinter::findNumUsedRegistersSI(MachineFunction &MF,
> + unsigned &NumSGPR,
> + unsigned &NumVGPR) const {
> unsigned MaxSGPR = 0;
> unsigned MaxVGPR = 0;
> bool VCCUsed = false;
> @@ -252,10 +264,24 @@
> }
> }
> }
> - if (VCCUsed) {
> +
> + if (VCCUsed)
> MaxSGPR += 2;
> - }
> - SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
> +
> + NumSGPR = MaxSGPR;
> + NumVGPR = MaxVGPR;
> +}
> +
> +void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &Out,
> + MachineFunction &MF) const {
> + findNumUsedRegistersSI(MF, Out.NumSGPR, Out.NumVGPR);
> +}
> +
> +void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF,
> + const SIProgramInfo &KernelInfo) {
> + const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
> +
> + SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
> unsigned RsrcReg;
> switch (MFI->ShaderType) {
> default: // Fall through
> @@ -266,7 +292,8 @@
> }
>
> OutStreamer.EmitIntValue(RsrcReg, 4);
> - OutStreamer.EmitIntValue(S_00B028_VGPRS(MaxVGPR / 4) | S_00B028_SGPRS(MaxSGPR / 8), 4);
> + OutStreamer.EmitIntValue(S_00B028_VGPRS(KernelInfo.NumVGPR / 4) |
> + S_00B028_SGPRS(KernelInfo.NumSGPR / 8), 4);
>
> unsigned LDSAlignShift;
> if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {
> Index: lib/Target/R600/AMDGPUAsmPrinter.h
> ===================================================================
> --- lib/Target/R600/AMDGPUAsmPrinter.h
> +++ lib/Target/R600/AMDGPUAsmPrinter.h
> @@ -22,6 +22,21 @@
> namespace llvm {
>
> class AMDGPUAsmPrinter : public AsmPrinter {
> +private:
> + struct SIProgramInfo {
> + unsigned NumSGPR;
> + unsigned NumVGPR;
> + };
> +
> + void getSIProgramInfo(SIProgramInfo &Out, MachineFunction &MF) const;
> + void findNumUsedRegistersSI(MachineFunction &MF,
> + unsigned &NumSGPR,
> + unsigned &NumVGPR) const;
> +
> + /// \brief Emit register usage information so that the GPU driver
> + /// can correctly setup the GPU state.
> + void EmitProgramInfoR600(MachineFunction &MF);
> + void EmitProgramInfoSI(MachineFunction &MF, const SIProgramInfo &KernelInfo);
>
> public:
> explicit AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer);
> @@ -32,11 +47,6 @@
> return "AMDGPU Assembly Printer";
> }
>
> - /// \brief Emit register usage information so that the GPU driver
> - /// can correctly setup the GPU state.
> - void EmitProgramInfoR600(MachineFunction &MF);
> - void EmitProgramInfoSI(MachineFunction &MF);
> -
> /// Implemented in AMDGPUMCInstLower.cpp
> virtual void EmitInstruction(const MachineInstr *MI);
>
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