[PATCH][AArch64] Neon scalar x indexed element and scalar copy implementation

[mcrosier at codeaurora.org]

Hi Ana,
Your patch has been committed in r194501.

 Chad

> Thanks Jiangning,
>
> The instruction aliases are missing (MOV b0, v0.B[0] is dup b0, v0.B[0]).
>
> I will add them in the next patch.
>
> Btw, we need aliases definitions for the SIMD copy instructions as well, I
> do not see them (DUP vetors, INS, UMOV).
>
> Ana.
>
>
>
> From: Jiangning Liu [mailto:liujiangning1 at gmail.com]
> Sent: Tuesday, November 12, 2013 1:50 AM
> To: Tim Northover
> Cc: Ana Pazos; Jiangning Liu; llvm-commits
> Subject: Re: [PATCH][AArch64] Neon scalar x indexed element and scalar
> copy
> implementation
>
>
>
> Hi Ana,
>
>
>
> MCHammer can pass SISD by element, but failed on assemble action of SISD
> copy.
>
>
>
> FAILED[0101 1110 0000 0001 0000 0100 0000 0000, 0x5e010400]: Should not be
> undefined (MOV      b0,v0.B[0])
>
> FAILED[0101 1110 0000 0001 0000 0100 0000 0001, 0x5e010401]: Should not be
> undefined (MOV      b1,v0.B[0])
>
>
>
> $ echo "MOV b0,v0.B[0]" | ~/llvm/build/bin/llvm-mc -triple=aarch64
> -mattr=+neon -show-encoding -assemble -show-inst
>
>           .text
>
> <stdin>:1:5: error: invalid operand for instruction
>
> MOV b0,v0.B[0]
>
>     ^
>
>
>
> Thanks,
>
> -Jiangning
>
>
>
>
>
> 2013/11/12 Tim Northover <t.p.northover at gmail.com>
>
> Hi Ana,
>
>
>> I added support in MC layer and tests for AdvSIMD scalar x indexed
>> element
>> (9 instrs) and AdvSIMD scalar copy (1 instr).
>
> Assuming it passes MC Hammer, it looks good to me.
>
> Cheers.
>
> Tim.
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>
>
>
>
>
> --
>
> Thanks,
>
> -Jiangning
>
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