X86TargetLowering::ExpandInlineAsm patch

[Chris Smowton]

What should the test case look like? I attach a test C file which, when 
compiled with -O1 using Dragonegg and Clang yields the attached ll 
files. I had to hack out Dragonegg's call to ExpandInlineAsm to get this 
(Clang never attempts to call it until codegen time). -O1 is necessary 
for GCC (4.6) to insert its internal implementation of htons.

Then CodeGenPrepare with a TargetLowering should raise both into 
llvm.bswap intrinsics; however I don't know a more elegant way to 
observe that than passing -print-after-all to llc, as calling opt 
-codegenprepare does so without a TargetLowering.

Both dragonegg.ll and clang.ll are raised into intrinsics with my patch; 
only clang.ll is without it.

Chris
>
>
> Compiling test.c (attached) should yield bitcode like 
> dragonegg-successful.ll.Looks pretty reasonable, needs a testcase :)
>
> -eric
>
>
> On Thu, Oct 31, 2013 at 11:49 AM, Chris Smowton <chris at smowton.net 
> <mailto:chris at smowton.net>> wrote:
>
>     See http://llvm.org/bugs/show_bug.cgi?id=17757 for details; Chris
>     Lattner advised I should cross-post the patch here.
>
>     Chris
>
>     _______________________________________________
>     llvm-commits mailing list
>     llvm-commits at cs.uiuc.edu <mailto:llvm-commits at cs.uiuc.edu>
>     http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>

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; ModuleID = 'dragonegg.bc'
target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64--linux-gnu"

module asm "\09.ident\09\22GCC: (Ubuntu/Linaro 4.6.4-1ubuntu1) 4.6.4 LLVM: 3.2svn\22"

define i32 @main(i32 %argc, i8** nocapture %argv) unnamed_addr nounwind uwtable ssp {
entry:
  %0 = trunc i32 %argc to i16
  %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{fpsr},~{flags},~{cc}"(i16 %0) nounwind, !srcloc !0
  %1 = zext i16 %asmtmp to i32
  ret i32 %1
}

!0 = metadata !{i64 935930}                       
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; ModuleID = 'clang.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

define i32 @main(i32 %argc, i8** nocapture %argv) nounwind uwtable {
  %1 = trunc i32 %argc to i16
  %2 = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %1) nounwind, !srcloc !0
  %3 = zext i16 %2 to i32
  ret i32 %3
}

!0 = metadata !{i32 -2147242250}