[PATCH] R600: Fix LowerUDIVREM

Tom Stellard tom at stellard.net
Wed Oct 30 09:09:21 PDT 2013


On Wed, Oct 30, 2013 at 04:09:12PM +0100, Vincent Lejeune wrote:

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> ---
>  lib/Target/R600/AMDGPUISelLowering.cpp | 10 +++++-----
>  test/CodeGen/R600/udiv.ll              | 21 +++++++++++++++++----
>  2 files changed, 22 insertions(+), 9 deletions(-)
> 
> diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
> index f6c074a..19535eb 100644
> --- a/lib/Target/R600/AMDGPUISelLowering.cpp
> +++ b/lib/Target/R600/AMDGPUISelLowering.cpp
> @@ -601,13 +601,13 @@ SDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op,
>    SDValue Remainder_GE_Den = DAG.getSelectCC(DL, Remainder, Den,
>                                                   DAG.getConstant(-1, VT),
>                                                   DAG.getConstant(0, VT),
> -                                                 ISD::SETGE);
> -  // Remainder_GE_Zero = (Remainder >= 0 ? -1 : 0)
> -  SDValue Remainder_GE_Zero = DAG.getSelectCC(DL, Remainder,
> -                                                  DAG.getConstant(0, VT),
> +                                                 ISD::SETUGE);
> +  // Remainder_GE_Zero = (Num >= Num_S_Remainder ? -1 : 0)
> +  SDValue Remainder_GE_Zero = DAG.getSelectCC(DL, Num,
> +                                                  Num_S_Remainder,
>                                                    DAG.getConstant(-1, VT),
>                                                    DAG.getConstant(0, VT),
> -                                                  ISD::SETGE);
> +                                                  ISD::SETUGE);
>    // Tmp1 = Remainder_GE_Den & Remainder_GE_Zero
>    SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den,
>                                                 Remainder_GE_Zero);
> diff --git a/test/CodeGen/R600/udiv.ll b/test/CodeGen/R600/udiv.ll
> index 19c0185..5371321 100644
> --- a/test/CodeGen/R600/udiv.ll
> +++ b/test/CodeGen/R600/udiv.ll
> @@ -1,13 +1,26 @@
>  ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
>  ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
>  
> +;EG-CHECK-LABEL: @test
> +;EG-CHECK-NOT: SETGE_INT
> +;EG-CHECK: CF_END
> +
> +define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
> +  %b_ptr = getelementptr i32 addrspace(1)* %in, i32 1
> +  %a = load i32 addrspace(1) * %in
> +  %b = load i32 addrspace(1) * %b_ptr
> +  %result = udiv i32 %a, %b
> +  store i32 %result, i32 addrspace(1)* %out
> +  ret void
> +}
> +
>  ;The code generated by udiv is long and complex and may frequently change.
>  ;The goal of this test is to make sure the ISel doesn't fail when it gets
>  ;a v4i32 udiv
>  
> -;EG-CHECK: @test2
> +;EG-CHECK-LABEL: @test2
>  ;EG-CHECK: CF_END
> -;SI-CHECK: @test2
> +;SI-CHECK-LABEL: @test2
>  ;SI-CHECK: S_ENDPGM
>  
>  define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
> @@ -19,9 +32,9 @@ define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
>    ret void
>  }
>  
> -;EG-CHECK: @test4
> +;EG-CHECK-LABEL: @test4
>  ;EG-CHECK: CF_END
> -;SI-CHECK: @test4
> +;SI-CHECK-LABEL: @test4
>  ;SI-CHECK: S_ENDPGM
>  
>  define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
> -- 
> 1.8.3.1
> 
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