[llvm] r192908 - [AArch64] Add support for NEON scalar three register different instruction

[Tim Northover]

Hi Chad,

I think you've missed the Constraint field again. The mla/mls versions
both read and write the destination (accumulator).

Once that's been accounted for you can replace these:

> +// Signed Saturating Doubling Multiply-Add Long
> +def int_aarch64_neon_vqdmlal : Neon_2Arg_Long_Intrinsic;
> +
> +// Signed Saturating Doubling Multiply-Subtract Long
> +def int_aarch64_neon_vqdmlsl : Neon_2Arg_Long_Intrinsic;

with the two operations "(vqadd accum, (vqdmull lhs, rhs))". If you
don't have an appropriate scalar "vqadd" you'll be needing one soon
anyway so it's probably best to just add it.

Cheers.

Tim.