[llvm] r192963 - Add hardware division as a default feature on Cortex-A15. Also add test cases to check this, and change diagnostics for the hwdiv-arm feature to something useful.
Silviu Baranga
silviu.baranga at arm.com
Fri Oct 18 03:18:41 PDT 2013
Author: sbaranga
Date: Fri Oct 18 05:18:40 2013
New Revision: 192963
URL: http://llvm.org/viewvc/llvm-project?rev=192963&view=rev
Log:
Add hardware division as a default feature on Cortex-A15. Also add test cases to check this, and change diagnostics for the hwdiv-arm feature to something useful.
Added:
llvm/trunk/test/MC/ARM/idiv.s
llvm/trunk/test/MC/ARM/invalid-idiv.s
Modified:
llvm/trunk/lib/Target/ARM/ARM.td
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=192963&r1=192962&r2=192963&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Fri Oct 18 05:18:40 2013
@@ -194,6 +194,7 @@ def ProcSwift : SubtargetFeature<"swif
def ProcA15 : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
"Cortex-A15 ARM processors",
[FeatureT2XtPk, FeatureVFP4,
+ FeatureMP, FeatureHWDiv, FeatureHWDivARM,
FeatureAvoidPartialCPSR,
FeatureTrustZone]>;
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=192963&r1=192962&r2=192963&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Oct 18 05:18:40 2013
@@ -221,9 +221,9 @@ def HasCrypto : Predicate<"Subtar
def HasFP16 : Predicate<"Subtarget->hasFP16()">,
AssemblerPredicate<"FeatureFP16","half-float">;
def HasDivide : Predicate<"Subtarget->hasDivide()">,
- AssemblerPredicate<"FeatureHWDiv", "divide">;
+ AssemblerPredicate<"FeatureHWDiv", "divide in THUMB">;
def HasDivideInARM : Predicate<"Subtarget->hasDivideInARMMode()">,
- AssemblerPredicate<"FeatureHWDivARM">;
+ AssemblerPredicate<"FeatureHWDivARM", "divide in ARM">;
def HasT2ExtractPack : Predicate<"Subtarget->hasT2ExtractPack()">,
AssemblerPredicate<"FeatureT2XtPk",
"pack/extract">;
Added: llvm/trunk/test/MC/ARM/idiv.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/idiv.s?rev=192963&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/idiv.s (added)
+++ llvm/trunk/test/MC/ARM/idiv.s Fri Oct 18 05:18:40 2013
@@ -0,0 +1,33 @@
+@ RUN: llvm-mc -triple=armv7 -mcpu=cortex-a15 -show-encoding < %s 2>&1 | FileCheck -check-prefix A15-ARM %s
+@ RUN: llvm-mc -triple=thumbv7 -mcpu=cortex-a15 -show-encoding < %s 2>&1 | FileCheck -check-prefix A15-THUMB %s
+
+@ RUN: llvm-mc -triple=armv7 -mcpu=cortex-a15 -mattr=-hwdiv -show-encoding < %s 2>&1 | FileCheck -check-prefix A15-ARM-NOTHUMBHWDIV %s
+@ RUN: llvm-mc -triple=thumbv7 -mcpu=cortex-a15 -mattr=-hwdiv-arm -show-encoding < %s 2>&1 | FileCheck -check-prefix A15-THUMB-NOARMHWDIV %s
+
+@ RUN: llvm-mc -triple=armv8 -show-encoding < %s 2>&1 | FileCheck -check-prefix ARMV8 %s
+@ RUN: llvm-mc -triple=thumbv8 -show-encoding < %s 2>&1 | FileCheck -check-prefix THUMBV8 %s
+
+@ RUN: llvm-mc -triple=armv8 -mattr=-hwdiv -show-encoding < %s 2>&1 | FileCheck -check-prefix ARMV8-NOTHUMBHWDIV %s
+@ RUN: llvm-mc -triple=thumbv8 -mattr=-hwdiv-arm -show-encoding < %s 2>&1 | FileCheck -check-prefix THUMBV8-NOTHUMBHWDIV %s
+
+ sdiv r1, r2, r3
+ udiv r3, r4, r5
+@ A15-ARM: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7]
+@ A15-ARM: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
+@ A15-THUMB: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1]
+@ A15-THUMB: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
+
+@ A15-ARM-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7]
+@ A15-ARM-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
+@ A15-THUMB-NOARMHWDIV: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1]
+@ A15-THUMB-NOARMHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
+
+@ ARMV8: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7]
+@ ARMV8: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
+@ THUMBV8: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1]
+@ THUMBV8: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
+
+@ ARMV8-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x12,0xf3,0x11,0xe7]
+@ ARMV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
+@ THUMBV8-NOTHUMBHWDIV: sdiv r1, r2, r3 @ encoding: [0x92,0xfb,0xf3,0xf1]
+@ THUMBV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
Added: llvm/trunk/test/MC/ARM/invalid-idiv.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/invalid-idiv.s?rev=192963&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/invalid-idiv.s (added)
+++ llvm/trunk/test/MC/ARM/invalid-idiv.s Fri Oct 18 05:18:40 2013
@@ -0,0 +1,28 @@
+@ RUN: not llvm-mc -triple=armv7 -mcpu=cortex-a15 -mattr=-hwdiv-arm < %s 2> %t
+@ RUN: FileCheck --check-prefix=ARM-A15 < %t %s
+@ RUN: not llvm-mc -triple=thumbv7 -mcpu=cortex-a15 -mattr=-hwdiv < %s 2> %t
+@ RUN: FileCheck --check-prefix=THUMB-A15 < %t %s
+@ RUN: not llvm-mc -triple=armv7 < %s 2> %t
+@ RUN: FileCheck --check-prefix=ARM < %t %s
+@ RUN: not llvm-mc -triple=thumbv7 < %s 2> %t
+@ RUN: FileCheck --check-prefix=THUMB < %t %s
+
+ sdiv r1, r2, r3
+ udiv r3, r4, r5
+@ ARM-A15: error: instruction requires: divide in ARM
+@ ARM-A15: sdiv r1, r2, r3
+@ ARM-A15: error: instruction requires: divide in ARM
+@ ARM-A15: udiv r3, r4, r5
+@ THUMB-A15: error: instruction requires: arm-mode
+@ THUMB-A15: sdiv r1, r2, r3
+@ THUMB-A15: error: instruction requires: arm-mode
+@ THUMB-A15: udiv r3, r4, r5
+
+@ ARM: error: instruction requires: divide in ARM
+@ ARM: sdiv r1, r2, r3
+@ ARM: error: instruction requires: divide in ARM
+@ ARM: udiv r3, r4, r5
+@ THUMB: error: instruction requires: divide in THUMB
+@ THUMB: sdiv r1, r2, r3
+@ THUMB: error: instruction requires: divide in THUMB
+@ THUMB: udiv r3, r4, r5
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