[PATCH] AArch64 Neon Scalar Integer Compare Instructions

[mcrosier at codeaurora.org]

>>
>> I will follow the LLVM developers policy, which is to submit/commit
>> small
>> incremental patches.  Unfortunately, I don't believe it's acceptable to
>> bend the rules to accommodate our needs.
>
>
> Hi Chad,
>
> I think Jiangning was more wondering whether it was possible for you to
> send him (or post to the list, but not ask for review on) a monolithic
> patch with all your changes applied - not asking you to change how the
> reviews are being done!
>
> Cheers,
>
> James

You're absolutely right, James; I realized that after I sent the email.  I
apologize if I was a bit terse, Jiangning.  Not my intention and I'm very
grateful for your assistance.

Unfortunately, I can't at the moment because I've not completed the
implementation for the scalar two register miscellaneous class.  Once
complete we could reconsider.  However, is there really an urgency to run
MCHammer prior to committing to the mainline?  I'm just trying to avoid
unnecessary overhead as I'm already slammed with work.

 Chad

>
> On 9 October 2013 16:45, Tim Northover <t.p.northover at gmail.com> wrote:
>
>> Hi Chad,
>>
>> > Alternatively, I could add the implicit zero to Ops[] in
>> CGBuiltin.cpp,
>> > but for some reason that doesn't feel right either.  Maybe it's fine.
>>
>> I'd say that's the nicer solution. For example it means that if anyone
>> wrote a vceq_s16 (say) and much later on we could prove the argument
>> was a constant 0 then we'd still be able to use the "cmeq hN, #0"
>> form.
>>
>> Of course, we could add patterns to do that anyway, but I like the
>> goal of having a minimal set of extra intrinsics. If nothing else
>> there's a reasonable hope that it would give more of this
>> serendipitous cross-matching.
>>
>> >> Possibly modelled as a NEON_VDUP for selection?
>> >
>> > I'm not sure I follow.  I'm rather new to this area.
>>
>> Just musing on what would get through to ISelDAG if you called
>> "@llvm.aarch64.neon.vcmeq.v1i16(<1 x i16> %lhs, <1 x i16> <i16 0>)".
>> I'm not really sure myself, though.
>>
>> Cheers.
>>
>> Tim.
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>