[llvm] r192173 - Explicitly disable AVX on a bunch of tests so they won't fail on AVX machines post r192171.

[Craig Topper]

Author: ctopper
Date: Tue Oct  8 01:06:57 2013
New Revision: 192173

URL: http://llvm.org/viewvc/llvm-project?rev=192173&view=rev
Log:
Explicitly disable AVX on a bunch of tests so they won't fail on AVX machines post r192171.

Modified:
    llvm/trunk/test/CodeGen/X86/bitcast2.ll
    llvm/trunk/test/CodeGen/X86/vec_set-8.ll
    llvm/trunk/test/CodeGen/X86/vec_set-9.ll
    llvm/trunk/test/CodeGen/X86/vec_set-C.ll
    llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll
    llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll

Modified: llvm/trunk/test/CodeGen/X86/bitcast2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast2.ll?rev=192173&r1=192172&r2=192173&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast2.ll Tue Oct  8 01:06:57 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 | grep movd | count 2
-; RUN: llc < %s -march=x86-64 | not grep rsp
+; RUN: llc < %s -march=x86-64 -mattr=-avx | grep movd | count 2
+; RUN: llc < %s -march=x86-64 -mattr=-avx | not grep rsp
 
 define i64 @test1(double %A) {
    %B = bitcast double %A to i64

Modified: llvm/trunk/test/CodeGen/X86/vec_set-8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-8.ll?rev=192173&r1=192172&r2=192173&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_set-8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_set-8.ll Tue Oct  8 01:06:57 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-win32 -mattr=-avx | FileCheck %s
 ; CHECK-NOT: movsd
 ; CHECK: movd {{%rdi|%rcx}}, %xmm0
 ; CHECK-NOT: movsd

Modified: llvm/trunk/test/CodeGen/X86/vec_set-9.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-9.ll?rev=192173&r1=192172&r2=192173&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_set-9.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_set-9.ll Tue Oct  8 01:06:57 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mattr=-avx | FileCheck %s
 
 ; CHECK: test3
 ; CHECK: movd

Modified: llvm/trunk/test/CodeGen/X86/vec_set-C.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-C.ll?rev=192173&r1=192172&r2=192173&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_set-C.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_set-C.ll Tue Oct  8 01:06:57 2013
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep movq
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep mov | count 1
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux -mattr=+sse2 | grep movd
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2,-avx | grep movq
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2,-avx | grep mov | count 1
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux -mattr=+sse2-avx | grep movd
 
 define <2 x i64> @t1(i64 %x) nounwind  {
 	%tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0

Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll?rev=192173&r1=192172&r2=192173&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll Tue Oct  8 01:06:57 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X86-32
-; RUN: llc < %s -march=x86-64 -mattr=+sse2 | FileCheck %s -check-prefix=X86-64
+; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | FileCheck %s -check-prefix=X86-32
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-avx | FileCheck %s -check-prefix=X86-64
 
 define <4 x i32> @t1(i32 %a) nounwind  {
 entry:

Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll?rev=192173&r1=192172&r2=192173&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll Tue Oct  8 01:06:57 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-win32 -mattr=-avx | FileCheck %s
 ; CHECK-NOT: xor
 ; CHECK: movd {{%rdi|%rcx}}, %xmm0
 ; CHECK-NOT: xor