[PATCH] Fixing Intel format of the vshufpd instruction

[Craig Topper]

LGTM.

On Thursday, September 26, 2013, Yunzhong Gao wrote:

> ygao added you to the CC list for the revision "Fixing Intel format of the
> vshufpd instruction".
>
> Hi,
> I noticed that the Intel format of the vshufpd instruction is incorrect.
>
> For example,
> ```
> $ echo "vshufpd XMM0, XMM0, XMM0, 1" | llvm-mc -x86-asm-syntax=intel
>   error: invalid operand for instruction
>   vshufpd XMM0, XMM0, XMM0, 1
>           ^~~~
> ```
>
> This seems to be caused by a typo in the tablegen entry for this
> instruction.
>
> In lib/Target/X86/X86InstrSSE.td:
>   "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src2, $src2, $src3}",
> should be
>   "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
>
> Can someone take a look whether this patch is good to go in?
>
> Thanks,
> - Gao
>
> http://llvm-reviews.chandlerc.com/D1759
>
> Files:
>   lib/Target/X86/X86InstrSSE.td
>   test/MC/Disassembler/X86/intel-syntax.txt
>   test/MC/X86/intel-syntax.s
>
> Index: lib/Target/X86/X86InstrSSE.td
> ===================================================================
> --- lib/Target/X86/X86InstrSSE.td
> +++ lib/Target/X86/X86InstrSSE.td
> @@ -2524,10 +2524,10 @@
>             "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2,
> $src3}",
>             memopv8f32, SSEPackedSingle>, TB, VEX_4V, VEX_L;
>  defm VSHUFPD  : sse12_shuffle<VR128, f128mem, v2f64,
> -           "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src2, $src2,
> $src3}",
> +           "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2,
> $src3}",
>             memopv2f64, SSEPackedDouble>, TB, OpSize, VEX_4V;
>  defm VSHUFPDY : sse12_shuffle<VR256, f256mem, v4f64,
> -           "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src2, $src2,
> $src3}",
> +           "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2,
> $src3}",
>             memopv4f64, SSEPackedDouble>, TB, OpSize, VEX_4V, VEX_L;
>
>  let Constraints = "$src1 = $dst" in {
> Index: test/MC/Disassembler/X86/intel-syntax.txt
> ===================================================================
> --- test/MC/Disassembler/X86/intel-syntax.txt
> +++ test/MC/Disassembler/X86/intel-syntax.txt
> @@ -105,6 +105,9 @@
>  # CHECK: retf
>  0x66 0xcb
>
> +# CHECK: vshufpd xmm0, xmm1, xmm2, 1
> +0xc5 0xf1 0xc6 0xc2 0x01
> +
>  # CHECK: vpgatherqq ymm2, qword ptr [rdi + 2*ymm1], ymm0
>  0xc4 0xe2 0xfd 0x91 0x14 0x4f
>
> Index: test/MC/X86/intel-syntax.s
> ===================================================================
> --- test/MC/X86/intel-syntax.s
> +++ test/MC/X86/intel-syntax.s
> @@ -69,6 +69,8 @@
>      mov QWORD PTR FS:320, RAX
>  // CHECK: movq %rax, %fs:20(%rbx)
>      mov QWORD PTR FS:20[rbx], RAX
> +// CHECK: vshufpd $1, %xmm2, %xmm1, %xmm0
> +    vshufpd XMM0, XMM1, XMM2, 1
>  // CHECK: vpgatherdd %xmm8, (%r15,%xmm9,2), %xmm1
>      vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8
>  // CHECK: movsd        -8, %xmm5
>


-- 
~Craig
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130926/4858e4ea/attachment.html>