[llvm] r191432 - [Sparc] Implements exception handling in SPARC with DwarfCFI.
Venkatraman Govindaraju
venkatra at cs.wisc.edu
Thu Sep 26 08:11:00 PDT 2013
Author: venkatra
Date: Thu Sep 26 10:11:00 2013
New Revision: 191432
URL: http://llvm.org/viewvc/llvm-project?rev=191432&view=rev
Log:
[Sparc] Implements exception handling in SPARC with DwarfCFI.
Added:
llvm/trunk/test/CodeGen/SPARC/exception.ll
Modified:
llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp
llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp?rev=191432&r1=191431&r2=191432&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp Thu Sep 26 10:11:00 2013
@@ -185,6 +185,9 @@ void AsmPrinter::emitCFIInstruction(cons
case MCCFIInstruction::OpOffset:
OutStreamer.EmitCFIOffset(Inst.getRegister(), Inst.getOffset());
break;
+ case MCCFIInstruction::OpRegister:
+ OutStreamer.EmitCFIRegister(Inst.getRegister(), Inst.getRegister2());
+ break;
case MCCFIInstruction::OpWindowSave:
OutStreamer.EmitCFIWindowSave();
break;
Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp?rev=191432&r1=191431&r2=191432&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp Thu Sep 26 10:11:00 2013
@@ -36,6 +36,8 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(Str
HasLEB128 = true;
SupportsDebugInformation = true;
+ ExceptionsType = ExceptionHandling::DwarfCFI;
+
SunStyleELFSectionSwitchSyntax = true;
UsesELFSectionDirectiveForBSS = true;
Modified: llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp?rev=191432&r1=191431&r2=191432&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp Thu Sep 26 10:11:00 2013
@@ -70,6 +70,25 @@ void SparcFrameLowering::emitPrologue(Ma
BuildMI(MBB, MBBI, dl, TII.get(SAVErr), SP::O6)
.addReg(SP::O6).addReg(SP::G1);
}
+ MachineModuleInfo &MMI = MF.getMMI();
+ const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
+ BuildMI(MBB, MBBI, dl, TII.get(SP::PROLOG_LABEL)).addSym(FrameLabel);
+
+ unsigned regFP = MRI->getDwarfRegNum(SP::I6, true);
+
+ // Emit ".cfi_def_cfa_register 30".
+ MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(FrameLabel,
+ regFP));
+ // Emit ".cfi_window_save".
+ MMI.addFrameInst(MCCFIInstruction::createWindowSave(FrameLabel));
+
+ unsigned regInRA = MRI->getDwarfRegNum(SP::I7, true);
+ unsigned regOutRA = MRI->getDwarfRegNum(SP::O7, true);
+ // Emit ".cfi_register 15, 31".
+ MMI.addFrameInst(MCCFIInstruction::createRegister(FrameLabel,
+ regOutRA,
+ regInRA));
}
void SparcFrameLowering::
Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=191432&r1=191431&r2=191432&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Thu Sep 26 10:11:00 2013
@@ -1432,8 +1432,6 @@ SparcTargetLowering::SparcTargetLowering
setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
- setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
-
// VASTART needs to be custom lowered to use the VarArgsFrameIndex.
setOperationAction(ISD::VASTART , MVT::Other, Custom);
// VAARG needs to be lowered to not do unaligned accesses for doubles.
@@ -1446,8 +1444,8 @@ SparcTargetLowering::SparcTargetLowering
setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom);
- // No debug info support yet.
- setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
+ setExceptionPointerRegister(SP::I0);
+ setExceptionSelectorRegister(SP::I1);
setStackPointerRegisterToSaveRestore(SP::O6);
Added: llvm/trunk/test/CodeGen/SPARC/exception.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/exception.ll?rev=191432&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/exception.ll (added)
+++ llvm/trunk/test/CodeGen/SPARC/exception.ll Thu Sep 26 10:11:00 2013
@@ -0,0 +1,112 @@
+; RUN: llc < %s -march=sparc | FileCheck %s
+
+
+%struct.__fundamental_type_info_pseudo = type { %struct.__type_info_pseudo }
+%struct.__type_info_pseudo = type { i8*, i8* }
+
+ at _ZTIi = external constant %struct.__fundamental_type_info_pseudo
+ at _ZTIf = external constant %struct.__fundamental_type_info_pseudo
+ at .cst = linker_private unnamed_addr constant [12 x i8] c"catched int\00", align 64
+ at .cst1 = linker_private unnamed_addr constant [14 x i8] c"catched float\00", align 64
+
+; CHECK-LABEL: main:
+; CHECK: .cfi_startproc
+; CHECK: .cfi_def_cfa_register 30
+; CHECK: .cfi_window_save
+; CHECK: .cfi_register 15, 31
+
+; CHECK: call __cxa_throw
+; CHECK: call __cxa_throw
+
+; CHECK: call __cxa_begin_catch
+; CHECK: call __cxa_end_catch
+
+; CHECK: call __cxa_begin_catch
+; CHECK: call __cxa_end_catch
+
+; CHECK: .cfi_endproc
+
+define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 {
+entry:
+ %0 = icmp eq i32 %argc, 2
+ %1 = tail call i8* @__cxa_allocate_exception(i32 4) #1
+ br i1 %0, label %"3", label %"4"
+
+"3": ; preds = %entry
+ %2 = bitcast i8* %1 to i32*
+ store i32 0, i32* %2, align 4
+ invoke void @__cxa_throw(i8* %1, i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIi to i8*), void (i8*)* null) #2
+ to label %3 unwind label %"8"
+
+; <label>:3 ; preds = %"3"
+ unreachable
+
+"4": ; preds = %entry
+ %4 = bitcast i8* %1 to float*
+ store float 1.000000e+00, float* %4, align 4
+
+
+ invoke void @__cxa_throw(i8* %1, i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIf to i8*), void (i8*)* null) #2
+ to label %5 unwind label %"8"
+
+; <label>:5 ; preds = %"4"
+ unreachable
+
+"5": ; preds = %"13", %"11"
+ %6 = phi i32 [ 2, %"13" ], [ 0, %"11" ]
+ ret i32 %6
+
+"8": ; preds = %"4", %"3"
+ %exc = landingpad { i8*, i32 } personality i32 (i32, i64, i8*, i8*)* @__gxx_personality_v0
+ catch %struct.__fundamental_type_info_pseudo* @_ZTIi
+ catch %struct.__fundamental_type_info_pseudo* @_ZTIf
+ %exc_ptr12 = extractvalue { i8*, i32 } %exc, 0
+ %filter13 = extractvalue { i8*, i32 } %exc, 1
+ %typeid = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIi to i8*))
+ %7 = icmp eq i32 %filter13, %typeid
+ br i1 %7, label %"11", label %8
+
+; <label>:8 ; preds = %"8"
+ %typeid8 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIf to i8*))
+ %9 = icmp eq i32 %filter13, %typeid8
+ br i1 %9, label %"13", label %"9"
+
+"9": ; preds = %8
+ resume { i8*, i32 } %exc
+
+"11": ; preds = %"8"
+ %10 = tail call i8* @__cxa_begin_catch(i8* %exc_ptr12) #1
+ %11 = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.cst, i32 0, i32 0))
+ tail call void @__cxa_end_catch() #1
+ br label %"5"
+
+"13": ; preds = %8
+ %12 = tail call i8* @__cxa_begin_catch(i8* %exc_ptr12) #1
+ %13 = tail call i32 @puts(i8* getelementptr inbounds ([14 x i8]* @.cst1, i32 0, i32 0))
+ tail call void @__cxa_end_catch() #1
+ br label %"5"
+}
+
+; Function Attrs: nounwind
+declare i8* @__cxa_allocate_exception(i32) #1
+
+; Function Attrs: noreturn
+declare void @__cxa_throw(i8*, i8*, void (i8*)*) #2
+
+declare void @__cxa_end_catch()
+
+; Function Attrs: nounwind readnone
+declare i32 @llvm.eh.typeid.for(i8*) #3
+
+; Function Attrs: nounwind
+declare i8* @__cxa_begin_catch(i8*) #1
+
+; Function Attrs: nounwind
+declare i32 @puts(i8* nocapture readonly) #1
+
+declare i32 @__gxx_personality_v0(i32, i64, i8*, i8*)
+
+attributes #0 = { "no-frame-pointer-elim-non-leaf"="false" }
+attributes #1 = { nounwind }
+attributes #2 = { noreturn }
+attributes #3 = { nounwind readnone }
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