[llvm] r190694 - Fix tests for hasFPARMv8 name change (r190692)
Amaury de la Vieuville
amaury.dlv at gmail.com
Fri Sep 13 07:37:52 PDT 2013
Author: amaury.dlv
Date: Fri Sep 13 09:37:52 2013
New Revision: 190694
URL: http://llvm.org/viewvc/llvm-project?rev=190694&view=rev
Log:
Fix tests for hasFPARMv8 name change (r190692)
Patch by Bradley Smith
Added:
llvm/trunk/test/MC/ARM/fp-armv8.s (contents, props changed)
- copied, changed from r190692, llvm/trunk/test/MC/ARM/v8fp.s
llvm/trunk/test/MC/ARM/invalid-fp-armv8.s (contents, props changed)
- copied, changed from r190692, llvm/trunk/test/MC/ARM/invalid-v8fp.s
llvm/trunk/test/MC/ARM/thumb-fp-armv8.s (contents, props changed)
- copied, changed from r190692, llvm/trunk/test/MC/ARM/thumb-v8fp.s
llvm/trunk/test/MC/Disassembler/ARM/fp-armv8.txt (contents, props changed)
- copied, changed from r190692, llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt
llvm/trunk/test/MC/Disassembler/ARM/thumb-fp-armv8.txt (contents, props changed)
- copied, changed from r190692, llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt
Removed:
llvm/trunk/test/MC/ARM/invalid-v8fp.s
llvm/trunk/test/MC/ARM/thumb-v8fp.s
llvm/trunk/test/MC/ARM/v8fp.s
llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt
llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt
Copied: llvm/trunk/test/MC/ARM/fp-armv8.s (from r190692, llvm/trunk/test/MC/ARM/v8fp.s)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/fp-armv8.s?p2=llvm/trunk/test/MC/ARM/fp-armv8.s&p1=llvm/trunk/test/MC/ARM/v8fp.s&r1=190692&r2=190694&rev=190694&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/v8fp.s (original)
+++ llvm/trunk/test/MC/ARM/fp-armv8.s Fri Sep 13 09:37:52 2013
@@ -1,4 +1,4 @@
-@ RUN: llvm-mc -triple armv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple armv8 -mattr=+fp-armv8 -show-encoding < %s | FileCheck %s
@ VCVT{B,T}
Propchange: llvm/trunk/test/MC/ARM/fp-armv8.s
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: llvm/trunk/test/MC/ARM/fp-armv8.s
------------------------------------------------------------------------------
svn:keywords = Rev Date Author URL Id
Copied: llvm/trunk/test/MC/ARM/invalid-fp-armv8.s (from r190692, llvm/trunk/test/MC/ARM/invalid-v8fp.s)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/invalid-fp-armv8.s?p2=llvm/trunk/test/MC/ARM/invalid-fp-armv8.s&p1=llvm/trunk/test/MC/ARM/invalid-v8fp.s&r1=190692&r2=190694&rev=190694&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/invalid-v8fp.s (original)
+++ llvm/trunk/test/MC/ARM/invalid-fp-armv8.s Fri Sep 13 09:37:52 2013
@@ -1,4 +1,4 @@
-@ RUN: not llvm-mc -triple armv8 -show-encoding -mattr=+v8fp < %s 2>&1 | FileCheck %s --check-prefix=V8
+@ RUN: not llvm-mc -triple armv8 -show-encoding -mattr=+fp-armv8 < %s 2>&1 | FileCheck %s --check-prefix=V8
@ VCVT{B,T}
Propchange: llvm/trunk/test/MC/ARM/invalid-fp-armv8.s
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: llvm/trunk/test/MC/ARM/invalid-fp-armv8.s
------------------------------------------------------------------------------
svn:keywords = Rev Date Author URL Id
Removed: llvm/trunk/test/MC/ARM/invalid-v8fp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/invalid-v8fp.s?rev=190693&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/invalid-v8fp.s (original)
+++ llvm/trunk/test/MC/ARM/invalid-v8fp.s (removed)
@@ -1,89 +0,0 @@
-@ RUN: not llvm-mc -triple armv8 -show-encoding -mattr=+v8fp < %s 2>&1 | FileCheck %s --check-prefix=V8
-
-@ VCVT{B,T}
-
- vcvtt.f64.f16 d3, s1
-@ V7-NOT: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
- vcvtt.f16.f64 s5, d12
-@ V7-NOT: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
-
- vsel.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselne.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselmi.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselpl.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselvc.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselcs.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselcc.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselhs.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vsello.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselhi.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vsells.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vsellt.f32 s3, s4, s6
-@ V8: error: invalid instruction
- vselle.f32 s3, s4, s6
-@ V8: error: invalid instruction
-
-vseleq.f32 s0, d2, d1
-@ V8: error: invalid operand for instruction
-vselgt.f64 s3, s2, s1
-@ V8: error: invalid operand for instruction
-vselgt.f32 s0, q3, q1
-@ V8: error: invalid operand for instruction
-vselgt.f64 q0, s3, q1
-@ V8: error: invalid operand for instruction
-
-vmaxnm.f32 s0, d2, d1
-@ V8: error: invalid operand for instruction
-vminnm.f64 s3, s2, s1
-@ V8: error: invalid operand for instruction
-vmaxnm.f32 s0, q3, q1
-@ V8: error: invalid operand for instruction
-vmaxnm.f64 q0, s3, q1
-@ V8: error: invalid operand for instruction
-vmaxnmgt.f64 q0, s3, q1
-@ CHECK: error: instruction 'vmaxnm' is not predicable, but condition code specified
-
-vcvta.s32.f64 d3, s2
-@ V8: error: invalid operand for instruction
-vcvtp.s32.f32 d3, s2
-@ V8: error: invalid operand for instruction
-vcvtn.u32.f64 d3, s2
-@ V8: error: invalid operand for instruction
-vcvtm.u32.f32 d3, s2
-@ V8: error: invalid operand for instruction
-vcvtnge.u32.f64 d3, s2
-@ V8: error: instruction 'vcvtn' is not predicable, but condition code specified
-
-vcvtbgt.f64.f16 q0, d3
-@ V8: error: invalid operand for instruction
-vcvttlt.f64.f16 s0, s3
-@ V8: error: invalid operand for instruction
-vcvttvs.f16.f64 s0, s3
-@ V8: error: invalid operand for instruction
-vcvtthi.f16.f64 q0, d3
-@ V8: error: invalid operand for instruction
-
-vrintrlo.f32.f32 d3, q0
-@ V8: error: invalid operand for instruction
-vrintxcs.f32.f32 d3, d0
-@ V8: error: instruction requires: NEON
-
-vrinta.f64.f64 s3, q0
-@ V8: error: invalid operand for instruction
-vrintn.f32.f32 d3, d0
-@ V8: error: instruction requires: NEON
-vrintp.f32 q3, q0
-@ V8: error: instruction requires: NEON
-vrintmlt.f32 q3, q0
-@ V8: error: instruction 'vrintm' is not predicable, but condition code specified
Copied: llvm/trunk/test/MC/ARM/thumb-fp-armv8.s (from r190692, llvm/trunk/test/MC/ARM/thumb-v8fp.s)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb-fp-armv8.s?p2=llvm/trunk/test/MC/ARM/thumb-fp-armv8.s&p1=llvm/trunk/test/MC/ARM/thumb-v8fp.s&r1=190692&r2=190694&rev=190694&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb-v8fp.s (original)
+++ llvm/trunk/test/MC/ARM/thumb-fp-armv8.s Fri Sep 13 09:37:52 2013
@@ -1,4 +1,4 @@
-@ RUN: llvm-mc -triple thumbv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple thumbv8 -mattr=+fp-armv8 -show-encoding < %s | FileCheck %s
@ VCVT{B,T}
Propchange: llvm/trunk/test/MC/ARM/thumb-fp-armv8.s
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: llvm/trunk/test/MC/ARM/thumb-fp-armv8.s
------------------------------------------------------------------------------
svn:keywords = Rev Date Author URL Id
Removed: llvm/trunk/test/MC/ARM/thumb-v8fp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb-v8fp.s?rev=190693&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb-v8fp.s (original)
+++ llvm/trunk/test/MC/ARM/thumb-v8fp.s (removed)
@@ -1,130 +0,0 @@
-@ RUN: llvm-mc -triple thumbv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
-
-@ VCVT{B,T}
-
- vcvtt.f64.f16 d3, s1
-@ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
- vcvtt.f16.f64 s5, d12
-@ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
-
- vcvtb.f64.f16 d3, s1
-@ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
- vcvtb.f16.f64 s4, d1
-@ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
-
- it ge
- vcvttge.f64.f16 d3, s1
-@ CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
- it gt
- vcvttgt.f16.f64 s5, d12
-@ CHECK: vcvttgt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
- it eq
- vcvtbeq.f64.f16 d3, s1
-@ CHECK: vcvtbeq.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
- it lt
- vcvtblt.f16.f64 s4, d1
-@ CHECK: vcvtblt.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
-
-
-@ VCVT{A,N,P,M}
-
- vcvta.s32.f32 s2, s3
-@ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
- vcvta.s32.f64 s2, d3
-@ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xbc,0xfe,0xc3,0x1b]
- vcvtn.s32.f32 s6, s23
-@ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xbd,0xfe,0xeb,0x3a]
- vcvtn.s32.f64 s6, d23
-@ CHECK: vcvtn.s32.f64 s6, d23 @ encoding: [0xbd,0xfe,0xe7,0x3b]
- vcvtp.s32.f32 s0, s4
-@ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xbe,0xfe,0xc2,0x0a]
- vcvtp.s32.f64 s0, d4
-@ CHECK: vcvtp.s32.f64 s0, d4 @ encoding: [0xbe,0xfe,0xc4,0x0b]
- vcvtm.s32.f32 s17, s8
-@ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x8a]
- vcvtm.s32.f64 s17, d8
-@ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xff,0xfe,0xc8,0x8b]
-
- vcvta.u32.f32 s2, s3
-@ CHECK: vcvta.u32.f32 s2, s3 @ encoding: [0xbc,0xfe,0x61,0x1a]
- vcvta.u32.f64 s2, d3
-@ CHECK: vcvta.u32.f64 s2, d3 @ encoding: [0xbc,0xfe,0x43,0x1b]
- vcvtn.u32.f32 s6, s23
-@ CHECK: vcvtn.u32.f32 s6, s23 @ encoding: [0xbd,0xfe,0x6b,0x3a]
- vcvtn.u32.f64 s6, d23
-@ CHECK: vcvtn.u32.f64 s6, d23 @ encoding: [0xbd,0xfe,0x67,0x3b]
- vcvtp.u32.f32 s0, s4
-@ CHECK: vcvtp.u32.f32 s0, s4 @ encoding: [0xbe,0xfe,0x42,0x0a]
- vcvtp.u32.f64 s0, d4
-@ CHECK: vcvtp.u32.f64 s0, d4 @ encoding: [0xbe,0xfe,0x44,0x0b]
- vcvtm.u32.f32 s17, s8
-@ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0xff,0xfe,0x44,0x8a]
- vcvtm.u32.f64 s17, d8
-@ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0xff,0xfe,0x48,0x8b]
-
-
-@ VSEL
- vselge.f32 s4, s1, s23
-@ CHECK: vselge.f32 s4, s1, s23 @ encoding: [0x20,0xfe,0xab,0x2a]
- vselge.f64 d30, d31, d23
-@ CHECK: vselge.f64 d30, d31, d23 @ encoding: [0x6f,0xfe,0xa7,0xeb]
- vselgt.f32 s0, s1, s0
-@ CHECK: vselgt.f32 s0, s1, s0 @ encoding: [0x30,0xfe,0x80,0x0a]
- vselgt.f64 d5, d10, d20
-@ CHECK: vselgt.f64 d5, d10, d20 @ encoding: [0x3a,0xfe,0x24,0x5b]
- vseleq.f32 s30, s28, s23
-@ CHECK: vseleq.f32 s30, s28, s23 @ encoding: [0x0e,0xfe,0x2b,0xfa]
- vseleq.f64 d2, d4, d8
-@ CHECK: vseleq.f64 d2, d4, d8 @ encoding: [0x04,0xfe,0x08,0x2b]
- vselvs.f32 s21, s16, s14
-@ CHECK: vselvs.f32 s21, s16, s14 @ encoding: [0x58,0xfe,0x07,0xaa]
- vselvs.f64 d0, d1, d31
-@ CHECK: vselvs.f64 d0, d1, d31 @ encoding: [0x11,0xfe,0x2f,0x0b]
-
-
-@ VMAXNM / VMINNM
- vmaxnm.f32 s5, s12, s0
-@ CHECK: vmaxnm.f32 s5, s12, s0 @ encoding: [0xc6,0xfe,0x00,0x2a]
- vmaxnm.f64 d5, d22, d30
-@ CHECK: vmaxnm.f64 d5, d22, d30 @ encoding: [0x86,0xfe,0xae,0x5b]
- vminnm.f32 s0, s0, s12
-@ CHECK: vminnm.f32 s0, s0, s12 @ encoding: [0x80,0xfe,0x46,0x0a]
- vminnm.f64 d4, d6, d9
-@ CHECK: vminnm.f64 d4, d6, d9 @ encoding: [0x86,0xfe,0x49,0x4b]
-
-@ VRINT{Z,R,X}
- it ge
- vrintzge.f64 d3, d12
-@ CHECK: vrintzge.f64 d3, d12 @ encoding: [0xb6,0xee,0xcc,0x3b]
- vrintz.f32 s3, s24
-@ CHECK: vrintz.f32 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x1a]
- it lt
- vrintrlt.f64 d5, d0
-@ CHECK: vrintrlt.f64 d5, d0 @ encoding: [0xb6,0xee,0x40,0x5b]
- vrintr.f32 s0, s9
-@ CHECK: vrintr.f32 s0, s9 @ encoding: [0xb6,0xee,0x64,0x0a]
- it eq
- vrintxeq.f64 d28, d30
-@ CHECK: vrintxeq.f64 d28, d30 @ encoding: [0xf7,0xee,0x6e,0xcb]
- it vs
- vrintxvs.f32 s10, s14
-@ CHECK: vrintxvs.f32 s10, s14 @ encoding: [0xb7,0xee,0x47,0x5a]
-
-@ VRINT{A,N,P,M}
-
- vrinta.f64 d3, d4
-@ CHECK: vrinta.f64 d3, d4 @ encoding: [0xb8,0xfe,0x44,0x3b]
- vrinta.f32 s12, s1
-@ CHECK: vrinta.f32 s12, s1 @ encoding: [0xb8,0xfe,0x60,0x6a]
- vrintn.f64 d3, d4
-@ CHECK: vrintn.f64 d3, d4 @ encoding: [0xb9,0xfe,0x44,0x3b]
- vrintn.f32 s12, s1
-@ CHECK: vrintn.f32 s12, s1 @ encoding: [0xb9,0xfe,0x60,0x6a]
- vrintp.f64 d3, d4
-@ CHECK: vrintp.f64 d3, d4 @ encoding: [0xba,0xfe,0x44,0x3b]
- vrintp.f32 s12, s1
-@ CHECK: vrintp.f32 s12, s1 @ encoding: [0xba,0xfe,0x60,0x6a]
- vrintm.f64 d3, d4
-@ CHECK: vrintm.f64 d3, d4 @ encoding: [0xbb,0xfe,0x44,0x3b]
- vrintm.f32 s12, s1
-@ CHECK: vrintm.f32 s12, s1 @ encoding: [0xbb,0xfe,0x60,0x6a]
Removed: llvm/trunk/test/MC/ARM/v8fp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/v8fp.s?rev=190693&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/v8fp.s (original)
+++ llvm/trunk/test/MC/ARM/v8fp.s (removed)
@@ -1,124 +0,0 @@
-@ RUN: llvm-mc -triple armv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
-
-@ VCVT{B,T}
-
- vcvtt.f64.f16 d3, s1
-@ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
- vcvtt.f16.f64 s5, d12
-@ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
-
- vcvtb.f64.f16 d3, s1
-@ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0xee]
- vcvtb.f16.f64 s4, d1
-@ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xee]
-
- vcvttge.f64.f16 d3, s1
-@ CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xae]
- vcvttgt.f16.f64 s5, d12
-@ CHECK: vcvttgt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xce]
-
- vcvtbeq.f64.f16 d3, s1
-@ CHECK: vcvtbeq.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0x0e]
- vcvtblt.f16.f64 s4, d1
-@ CHECK: vcvtblt.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xbe]
-
-
-@ VCVT{A,N,P,M}
-
- vcvta.s32.f32 s2, s3
-@ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xe1,0x1a,0xbc,0xfe]
- vcvta.s32.f64 s2, d3
-@ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xc3,0x1b,0xbc,0xfe]
- vcvtn.s32.f32 s6, s23
-@ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xeb,0x3a,0xbd,0xfe]
- vcvtn.s32.f64 s6, d23
-@ CHECK: vcvtn.s32.f64 s6, d23 @ encoding: [0xe7,0x3b,0xbd,0xfe]
- vcvtp.s32.f32 s0, s4
-@ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xc2,0x0a,0xbe,0xfe]
- vcvtp.s32.f64 s0, d4
-@ CHECK: vcvtp.s32.f64 s0, d4 @ encoding: [0xc4,0x0b,0xbe,0xfe]
- vcvtm.s32.f32 s17, s8
-@ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xc4,0x8a,0xff,0xfe]
- vcvtm.s32.f64 s17, d8
-@ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xc8,0x8b,0xff,0xfe]
-
- vcvta.u32.f32 s2, s3
-@ CHECK: vcvta.u32.f32 s2, s3 @ encoding: [0x61,0x1a,0xbc,0xfe]
- vcvta.u32.f64 s2, d3
-@ CHECK: vcvta.u32.f64 s2, d3 @ encoding: [0x43,0x1b,0xbc,0xfe]
- vcvtn.u32.f32 s6, s23
-@ CHECK: vcvtn.u32.f32 s6, s23 @ encoding: [0x6b,0x3a,0xbd,0xfe]
- vcvtn.u32.f64 s6, d23
-@ CHECK: vcvtn.u32.f64 s6, d23 @ encoding: [0x67,0x3b,0xbd,0xfe]
- vcvtp.u32.f32 s0, s4
-@ CHECK: vcvtp.u32.f32 s0, s4 @ encoding: [0x42,0x0a,0xbe,0xfe]
- vcvtp.u32.f64 s0, d4
-@ CHECK: vcvtp.u32.f64 s0, d4 @ encoding: [0x44,0x0b,0xbe,0xfe]
- vcvtm.u32.f32 s17, s8
-@ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0x44,0x8a,0xff,0xfe]
- vcvtm.u32.f64 s17, d8
-@ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0x48,0x8b,0xff,0xfe]
-
-
-@ VSEL
- vselge.f32 s4, s1, s23
-@ CHECK: vselge.f32 s4, s1, s23 @ encoding: [0xab,0x2a,0x20,0xfe]
- vselge.f64 d30, d31, d23
-@ CHECK: vselge.f64 d30, d31, d23 @ encoding: [0xa7,0xeb,0x6f,0xfe]
- vselgt.f32 s0, s1, s0
-@ CHECK: vselgt.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x30,0xfe]
- vselgt.f64 d5, d10, d20
-@ CHECK: vselgt.f64 d5, d10, d20 @ encoding: [0x24,0x5b,0x3a,0xfe]
- vseleq.f32 s30, s28, s23
-@ CHECK: vseleq.f32 s30, s28, s23 @ encoding: [0x2b,0xfa,0x0e,0xfe]
- vseleq.f64 d2, d4, d8
-@ CHECK: vseleq.f64 d2, d4, d8 @ encoding: [0x08,0x2b,0x04,0xfe]
- vselvs.f32 s21, s16, s14
-@ CHECK: vselvs.f32 s21, s16, s14 @ encoding: [0x07,0xaa,0x58,0xfe]
- vselvs.f64 d0, d1, d31
-@ CHECK: vselvs.f64 d0, d1, d31 @ encoding: [0x2f,0x0b,0x11,0xfe]
-
-
-@ VMAXNM / VMINNM
- vmaxnm.f32 s5, s12, s0
-@ CHECK: vmaxnm.f32 s5, s12, s0 @ encoding: [0x00,0x2a,0xc6,0xfe]
- vmaxnm.f64 d5, d22, d30
-@ CHECK: vmaxnm.f64 d5, d22, d30 @ encoding: [0xae,0x5b,0x86,0xfe]
- vminnm.f32 s0, s0, s12
-@ CHECK: vminnm.f32 s0, s0, s12 @ encoding: [0x46,0x0a,0x80,0xfe]
- vminnm.f64 d4, d6, d9
-@ CHECK: vminnm.f64 d4, d6, d9 @ encoding: [0x49,0x4b,0x86,0xfe]
-
-@ VRINT{Z,R,X}
-
- vrintzge.f64 d3, d12
-@ CHECK: vrintzge.f64 d3, d12 @ encoding: [0xcc,0x3b,0xb6,0xae]
- vrintz.f32 s3, s24
-@ CHECK: vrintz.f32 s3, s24 @ encoding: [0xcc,0x1a,0xf6,0xee]
- vrintrlt.f64 d5, d0
-@ CHECK: vrintrlt.f64 d5, d0 @ encoding: [0x40,0x5b,0xb6,0xbe]
- vrintr.f32 s0, s9
-@ CHECK: vrintr.f32 s0, s9 @ encoding: [0x64,0x0a,0xb6,0xee]
- vrintxeq.f64 d28, d30
-@ CHECK: vrintxeq.f64 d28, d30 @ encoding: [0x6e,0xcb,0xf7,0x0e]
- vrintxvs.f32 s10, s14
-@ CHECK: vrintxvs.f32 s10, s14 @ encoding: [0x47,0x5a,0xb7,0x6e]
-
-@ VRINT{A,N,P,M}
-
- vrinta.f64 d3, d4
-@ CHECK: vrinta.f64 d3, d4 @ encoding: [0x44,0x3b,0xb8,0xfe]
- vrinta.f32 s12, s1
-@ CHECK: vrinta.f32 s12, s1 @ encoding: [0x60,0x6a,0xb8,0xfe]
- vrintn.f64 d3, d4
-@ CHECK: vrintn.f64 d3, d4 @ encoding: [0x44,0x3b,0xb9,0xfe]
- vrintn.f32 s12, s1
-@ CHECK: vrintn.f32 s12, s1 @ encoding: [0x60,0x6a,0xb9,0xfe]
- vrintp.f64 d3, d4
-@ CHECK: vrintp.f64 d3, d4 @ encoding: [0x44,0x3b,0xba,0xfe]
- vrintp.f32 s12, s1
-@ CHECK: vrintp.f32 s12, s1 @ encoding: [0x60,0x6a,0xba,0xfe]
- vrintm.f64 d3, d4
-@ CHECK: vrintm.f64 d3, d4 @ encoding: [0x44,0x3b,0xbb,0xfe]
- vrintm.f32 s12, s1
-@ CHECK: vrintm.f32 s12, s1 @ encoding: [0x60,0x6a,0xbb,0xfe]
Copied: llvm/trunk/test/MC/Disassembler/ARM/fp-armv8.txt (from r190692, llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/fp-armv8.txt?p2=llvm/trunk/test/MC/Disassembler/ARM/fp-armv8.txt&p1=llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt&r1=190692&r2=190694&rev=190694&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/fp-armv8.txt Fri Sep 13 09:37:52 2013
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -disassemble -triple armv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -disassemble -triple armv8 -mattr=+fp-armv8 -show-encoding < %s | FileCheck %s
0xe0 0x3b 0xb2 0xee
# CHECK: vcvtt.f64.f16 d3, s1
Propchange: llvm/trunk/test/MC/Disassembler/ARM/fp-armv8.txt
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: llvm/trunk/test/MC/Disassembler/ARM/fp-armv8.txt
------------------------------------------------------------------------------
svn:keywords = Rev Date Author URL Id
Copied: llvm/trunk/test/MC/Disassembler/ARM/thumb-fp-armv8.txt (from r190692, llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-fp-armv8.txt?p2=llvm/trunk/test/MC/Disassembler/ARM/thumb-fp-armv8.txt&p1=llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt&r1=190692&r2=190694&rev=190694&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb-fp-armv8.txt Fri Sep 13 09:37:52 2013
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -disassemble -triple thumbv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
+# RUN: llvm-mc -disassemble -triple thumbv8 -mattr=+fp-armv8 -show-encoding < %s | FileCheck %s
0xb2 0xee 0xe0 0x3b
# CHECK: vcvtt.f64.f16 d3, s1
Propchange: llvm/trunk/test/MC/Disassembler/ARM/thumb-fp-armv8.txt
------------------------------------------------------------------------------
svn:eol-style = native
Propchange: llvm/trunk/test/MC/Disassembler/ARM/thumb-fp-armv8.txt
------------------------------------------------------------------------------
svn:keywords = Rev Date Author URL Id
Removed: llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt?rev=190693&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb-v8fp.txt (removed)
@@ -1,163 +0,0 @@
-# RUN: llvm-mc -disassemble -triple thumbv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
-
-0xb2 0xee 0xe0 0x3b
-# CHECK: vcvtt.f64.f16 d3, s1
-
-0xf3 0xee 0xcc 0x2b
-# CHECK: vcvtt.f16.f64 s5, d12
-
-0xb2 0xee 0x60 0x3b
-# CHECK: vcvtb.f64.f16 d3, s1
-
-0xb3 0xee 0x41 0x2b
-# CHECK: vcvtb.f16.f64 s4, d1
-
-0xa8 0xbf # IT block
-0xb2 0xee 0xe0 0x3b
-# CHECK: vcvttge.f64.f16 d3, s1
-
-0xc8 0xbf # IT block
-0xf3 0xee 0xcc 0x2b
-# CHECK: vcvttgt.f16.f64 s5, d12
-
-0x08 0xbf # IT block
-0xb2 0xee 0x60 0x3b
-# CHECK: vcvtbeq.f64.f16 d3, s1
-
-0xb8 0xbf # IT block
-0xb3 0xee 0x41 0x2b
-# CHECK: vcvtblt.f16.f64 s4, d1
-
-
-0xbc 0xfe 0xe1 0x1a
-# CHECK: vcvta.s32.f32 s2, s3
-
-0xbc 0xfe 0xc3 0x1b
-# CHECK: vcvta.s32.f64 s2, d3
-
-0xbd 0xfe 0xeb 0x3a
-# CHECK: vcvtn.s32.f32 s6, s23
-
-0xbd 0xfe 0xe7 0x3b
-# CHECK: vcvtn.s32.f64 s6, d23
-
-0xbe 0xfe 0xc2 0x0a
-# CHECK: vcvtp.s32.f32 s0, s4
-
-0xbe 0xfe 0xc4 0x0b
-# CHECK: vcvtp.s32.f64 s0, d4
-
-0xff 0xfe 0xc4 0x8a
-# CHECK: vcvtm.s32.f32 s17, s8
-
-0xff 0xfe 0xc8 0x8b
-# CHECK: vcvtm.s32.f64 s17, d8
-
-0xbc 0xfe 0x61 0x1a
-# CHECK: vcvta.u32.f32 s2, s3
-
-0xbc 0xfe 0x43 0x1b
-# CHECK: vcvta.u32.f64 s2, d3
-
-0xbd 0xfe 0x6b 0x3a
-# CHECK: vcvtn.u32.f32 s6, s23
-
-0xbd 0xfe 0x67 0x3b
-# CHECK: vcvtn.u32.f64 s6, d23
-
-0xbe 0xfe 0x42 0x0a
-# CHECK: vcvtp.u32.f32 s0, s4
-
-0xbe 0xfe 0x44 0x0b
-# CHECK: vcvtp.u32.f64 s0, d4
-
-0xff 0xfe 0x44 0x8a
-# CHECK: vcvtm.u32.f32 s17, s8
-
-0xff 0xfe 0x48 0x8b
-# CHECK: vcvtm.u32.f64 s17, d8
-
-
-0x20 0xfe 0xab 0x2a
-# CHECK: vselge.f32 s4, s1, s23
-
-0x6f 0xfe 0xa7 0xeb
-# CHECK: vselge.f64 d30, d31, d23
-
-0x30 0xfe 0x80 0x0a
-# CHECK: vselgt.f32 s0, s1, s0
-
-0x3a 0xfe 0x24 0x5b
-# CHECK: vselgt.f64 d5, d10, d20
-
-0x0e 0xfe 0x2b 0xfa
-# CHECK: vseleq.f32 s30, s28, s23
-
-0x04 0xfe 0x08 0x2b
-# CHECK: vseleq.f64 d2, d4, d8
-
-0x58 0xfe 0x07 0xaa
-# CHECK: vselvs.f32 s21, s16, s14
-
-0x11 0xfe 0x2f 0x0b
-# CHECK: vselvs.f64 d0, d1, d31
-
-
-0xc6 0xfe 0x00 0x2a
-# CHECK: vmaxnm.f32 s5, s12, s0
-
-0x86 0xfe 0xae 0x5b
-# CHECK: vmaxnm.f64 d5, d22, d30
-
-0x80 0xfe 0x46 0x0a
-# CHECK: vminnm.f32 s0, s0, s12
-
-0x86 0xfe 0x49 0x4b
-# CHECK: vminnm.f64 d4, d6, d9
-
-
-0xa8 0xbf # IT block
-0xb6 0xee 0xcc 0x3b
-# CHECK: vrintzge.f64 d3, d12
-
-0xf6 0xee 0xcc 0x1a
-# CHECK: vrintz.f32 s3, s24
-
-0xb8 0xbf # IT block
-0xb6 0xee 0x40 0x5b
-# CHECK: vrintrlt.f64 d5, d0
-
-0xb6 0xee 0x64 0x0a
-# CHECK: vrintr.f32 s0, s9
-
-0x08 0xbf # IT block
-0xf7 0xee 0x6e 0xcb
-# CHECK: vrintxeq.f64 d28, d30
-
-0x68 0xbf # IT block
-0xb7 0xee 0x47 0x5a
-# CHECK: vrintxvs.f32 s10, s14
-
-0xb8 0xfe 0x44 0x3b
-# CHECK: vrinta.f64 d3, d4
-
-0xb8 0xfe 0x60 0x6a
-# CHECK: vrinta.f32 s12, s1
-
-0xb9 0xfe 0x44 0x3b
-# CHECK: vrintn.f64 d3, d4
-
-0xb9 0xfe 0x60 0x6a
-# CHECK: vrintn.f32 s12, s1
-
-0xba 0xfe 0x44 0x3b
-# CHECK: vrintp.f64 d3, d4
-
-0xba 0xfe 0x60 0x6a
-# CHECK: vrintp.f32 s12, s1
-
-0xbb 0xfe 0x44 0x3b
-# CHECK: vrintm.f64 d3, d4
-
-0xbb 0xfe 0x60 0x6a
-# CHECK: vrintm.f32 s12, s1
Removed: llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt?rev=190693&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/v8fp.txt (removed)
@@ -1,155 +0,0 @@
-# RUN: llvm-mc -disassemble -triple armv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
-
-0xe0 0x3b 0xb2 0xee
-# CHECK: vcvtt.f64.f16 d3, s1
-
-0xcc 0x2b 0xf3 0xee
-# CHECK: vcvtt.f16.f64 s5, d12
-
-0x60 0x3b 0xb2 0xee
-# CHECK: vcvtb.f64.f16 d3, s1
-
-0x41 0x2b 0xb3 0xee
-# CHECK: vcvtb.f16.f64 s4, d1
-
-0xe0 0x3b 0xb2 0xae
-# CHECK: vcvttge.f64.f16 d3, s1
-
-0xcc 0x2b 0xf3 0xce
-# CHECK: vcvttgt.f16.f64 s5, d12
-
-0x60 0x3b 0xb2 0x0e
-# CHECK: vcvtbeq.f64.f16 d3, s1
-
-0x41 0x2b 0xb3 0xbe
-# CHECK: vcvtblt.f16.f64 s4, d1
-
-
-0xe1 0x1a 0xbc 0xfe
-# CHECK: vcvta.s32.f32 s2, s3
-
-0xc3 0x1b 0xbc 0xfe
-# CHECK: vcvta.s32.f64 s2, d3
-
-0xeb 0x3a 0xbd 0xfe
-# CHECK: vcvtn.s32.f32 s6, s23
-
-0xe7 0x3b 0xbd 0xfe
-# CHECK: vcvtn.s32.f64 s6, d23
-
-0xc2 0x0a 0xbe 0xfe
-# CHECK: vcvtp.s32.f32 s0, s4
-
-0xc4 0x0b 0xbe 0xfe
-# CHECK: vcvtp.s32.f64 s0, d4
-
-0xc4 0x8a 0xff 0xfe
-# CHECK: vcvtm.s32.f32 s17, s8
-
-0xc8 0x8b 0xff 0xfe
-# CHECK: vcvtm.s32.f64 s17, d8
-
-0x61 0x1a 0xbc 0xfe
-# CHECK: vcvta.u32.f32 s2, s3
-
-0x43 0x1b 0xbc 0xfe
-# CHECK: vcvta.u32.f64 s2, d3
-
-0x6b 0x3a 0xbd 0xfe
-# CHECK: vcvtn.u32.f32 s6, s23
-
-0x67 0x3b 0xbd 0xfe
-# CHECK: vcvtn.u32.f64 s6, d23
-
-0x42 0x0a 0xbe 0xfe
-# CHECK: vcvtp.u32.f32 s0, s4
-
-0x44 0x0b 0xbe 0xfe
-# CHECK: vcvtp.u32.f64 s0, d4
-
-0x44 0x8a 0xff 0xfe
-# CHECK: vcvtm.u32.f32 s17, s8
-
-0x48 0x8b 0xff 0xfe
-# CHECK: vcvtm.u32.f64 s17, d8
-
-
-0xab 0x2a 0x20 0xfe
-# CHECK: vselge.f32 s4, s1, s23
-
-0xa7 0xeb 0x6f 0xfe
-# CHECK: vselge.f64 d30, d31, d23
-
-0x80 0x0a 0x30 0xfe
-# CHECK: vselgt.f32 s0, s1, s0
-
-0x24 0x5b 0x3a 0xfe
-# CHECK: vselgt.f64 d5, d10, d20
-
-0x2b 0xfa 0x0e 0xfe
-# CHECK: vseleq.f32 s30, s28, s23
-
-0x08 0x2b 0x04 0xfe
-# CHECK: vseleq.f64 d2, d4, d8
-
-0x07 0xaa 0x58 0xfe
-# CHECK: vselvs.f32 s21, s16, s14
-
-0x2f 0x0b 0x11 0xfe
-# CHECK: vselvs.f64 d0, d1, d31
-
-
-0x00 0x2a 0xc6 0xfe
-# CHECK: vmaxnm.f32 s5, s12, s0
-
-0xae 0x5b 0x86 0xfe
-# CHECK: vmaxnm.f64 d5, d22, d30
-
-0x46 0x0a 0x80 0xfe
-# CHECK: vminnm.f32 s0, s0, s12
-
-0x49 0x4b 0x86 0xfe
-# CHECK: vminnm.f64 d4, d6, d9
-
-
-0xcc 0x3b 0xb6 0xae
-# CHECK: vrintzge.f64 d3, d12
-
-0xcc 0x1a 0xf6 0xee
-# CHECK: vrintz.f32 s3, s24
-
-0x40 0x5b 0xb6 0xbe
-# CHECK: vrintrlt.f64 d5, d0
-
-0x64 0x0a 0xb6 0xee
-# CHECK: vrintr.f32 s0, s9
-
-0x6e 0xcb 0xf7 0x0e
-# CHECK: vrintxeq.f64 d28, d30
-
-0x47 0x5a 0xb7 0x6e
-# CHECK: vrintxvs.f32 s10, s14
-
-0x44 0x3b 0xb8 0xfe
-# CHECK: vrinta.f64 d3, d4
-
-0x60 0x6a 0xb8 0xfe
-# CHECK: vrinta.f32 s12, s1
-
-0x44 0x3b 0xb9 0xfe
-# CHECK: vrintn.f64 d3, d4
-
-0x60 0x6a 0xb9 0xfe
-# CHECK: vrintn.f32 s12, s1
-
-0x44 0x3b 0xba 0xfe
-# CHECK: vrintp.f64 d3, d4
-
-0x60 0x6a 0xba 0xfe
-# CHECK: vrintp.f32 s12, s1
-
-0x44 0x3b 0xbb 0xfe
-# CHECK: vrintm.f64 d3, d4
-
-0x60 0x6a 0xbb 0xfe
-# CHECK: vrintm.f32 s12, s1
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