[PATCH] Finish assembly support for Intel SHA Extensions

Langmuir, Ben ben.langmuir at intel.com
Fri Sep 13 06:56:51 PDT 2013


I thought that having the defm for the new instructions inside the same let block as sha1rnds4 would suffice.  Is that not the case? That seems to be how the AES instructions are set up just below this.

Thanks for the tip about blendvpd - I'll look at adding InstAliases.

Ben

From: Craig Topper [mailto:craig.topper at gmail.com]
Sent: Thursday, September 12, 2013 11:34 PM
To: reviews+D1663+public+238ef3f1c2db68b0 at llvm-reviews.chandlerc.com
Cc: Langmuir, Ben; llvm-commits at cs.uiuc.edu; Nadav Rotem
Subject: Re: [PATCH] Finish assembly support for Intel SHA Extensions

I think you're missing  let Constraints = "$src1 = $dst", hasSideEffects = 0, Predicates = [HasSHA] on the new instructions aren't you?

Also please add InstAliases for the SHA256RNDS2 instruction so that users can specify the implicit xmm0 operand. See the aliases for blendvpd for an example.


2013/9/12 Ben Langmuir <ben.langmuir at intel.com<mailto:ben.langmuir at intel.com>>
Hi craig.topper,

Add the remaining Intel SHA instructions and tests.  All of these instructions
seem to have the same form, except that sha256rnds2 has an implicit read
dependency on xmm0.

http://llvm-reviews.chandlerc.com/D1663

Files:
  lib/Target/X86/X86InstrSSE.td
  test/MC/Disassembler/X86/x86-64.txt
  test/MC/X86/x86_64-encoding.s

Index: lib/Target/X86/X86InstrSSE.td
===================================================================
--- lib/Target/X86/X86InstrSSE.td
+++ lib/Target/X86/X86InstrSSE.td
@@ -7324,6 +7324,17 @@
 // SHA-NI Instructions
 //===----------------------------------------------------------------------===//

+multiclass SHAI_binop<bits<8> Opc, string OpcodeStr> {
+  def rr : I<Opc, MRMSrcReg, (outs VR128:$dst),
+             (ins VR128:$src1, VR128:$src2),
+             !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8;
+
+  let mayLoad = 1 in
+  def rm : I<Opc, MRMSrcMem, (outs VR128:$dst),
+             (ins VR128:$src1, i128mem:$src2),
+             !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8;
+}
+
 let Constraints = "$src1 = $dst", hasSideEffects = 0, Predicates = [HasSHA] in {
   def SHA1RNDS4rri : Ii8<0xCC, MRMSrcReg, (outs VR128:$dst),
                          (ins VR128:$src1, VR128:$src2, i8imm:$src3),
@@ -7334,6 +7345,16 @@
                          (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
                          "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
                          []>, TA;
+
+  defm SHA1NEXTE : SHAI_binop<0xC8, "sha1nexte">;
+  defm SHA1MSG1  : SHAI_binop<0xC9, "sha1msg1">;
+  defm SHA1MSG2  : SHAI_binop<0xCA, "sha1msg2">;
+
+  let Uses=[XMM0] in
+  defm SHA256RNDS2 : SHAI_binop<0xCB, "sha256rnds2">;
+
+  defm SHA256MSG1 : SHAI_binop<0xCC, "sha256msg1">;
+  defm SHA256MSG2 : SHAI_binop<0xCD, "sha256msg2">;
 }

 //===----------------------------------------------------------------------===//
Index: test/MC/Disassembler/X86/x86-64.txt
===================================================================
--- test/MC/Disassembler/X86/x86-64.txt
+++ test/MC/Disassembler/X86/x86-64.txt
@@ -162,4 +162,40 @@
 0x0f 0x3a 0xcc 0xd1 0x01

 # CHECK: sha1rnds4 $1, (%rax), %xmm2
-0x0f 0x3a 0xcc 0x10 0x01
\ No newline at end of file
+0x0f 0x3a 0xcc 0x10 0x01
+
+# CHECK: sha1nexte %xmm1, %xmm2
+0x0f 0x38 0xc8 0xd1
+
+# CHECK: sha1nexte (%rax), %xmm2
+0x0f 0x38 0xc8 0x10
+
+# CHECK: sha1msg1 %xmm1, %xmm2
+0x0f 0x38 0xc9 0xd1
+
+# CHECK: sha1msg1 (%rax), %xmm2
+0x0f 0x38 0xc9 0x10
+
+# CHECK: sha1msg2 %xmm1, %xmm2
+0x0f 0x38 0xca 0xd1
+
+# CHECK: sha1msg2 (%rax), %xmm2
+0x0f 0x38 0xca 0x10
+
+# CHECK: sha256rnds2 (%rax), %xmm2
+0x0f 0x38 0xcb 0x10
+
+# CHECK: sha256rnds2 %xmm1, %xmm2
+0x0f 0x38 0xcb 0xd1
+
+# CHECK: sha256msg1 %xmm1, %xmm2
+0x0f 0x38 0xcc 0xd1
+
+# CHECK: sha256msg1 (%rax), %xmm2
+0x0f 0x38 0xcc 0x10
+
+# CHECK: sha256msg2 %xmm1, %xmm2
+0x0f 0x38 0xcd 0xd1
+
+# CHECK: sha256msg2 (%rax), %xmm2
+0x0f 0x38 0xcd 0x10
\ No newline at end of file
Index: test/MC/X86/x86_64-encoding.s
===================================================================
--- test/MC/X86/x86_64-encoding.s
+++ test/MC/X86/x86_64-encoding.s
@@ -128,6 +128,50 @@
 // CHECK:   encoding: [0x0f,0x3a,0xcc,0x10,0x01]
 sha1rnds4 $1, (%rax), %xmm2

+// CHECK: sha1nexte %xmm1, %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xc8,0xd1]
+sha1nexte %xmm1, %xmm2
+
+// CHECK: sha1msg1 %xmm1, %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xc9,0xd1]
+sha1msg1 %xmm1, %xmm2
+
+// CHECK: sha1msg1 (%rax), %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xc9,0x10]
+sha1msg1 (%rax), %xmm2
+
+// CHECK: sha1msg2 %xmm1, %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xca,0xd1]
+sha1msg2 %xmm1, %xmm2
+
+// CHECK: sha1msg2 (%rax), %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xca,0x10]
+sha1msg2 (%rax), %xmm2
+
+// CHECK: sha256rnds2 (%rax), %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xcb,0x10]
+sha256rnds2 (%rax), %xmm2
+
+// CHECK: sha256rnds2 %xmm1, %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xcb,0xd1]
+sha256rnds2 %xmm1, %xmm2
+
+// CHECK: sha256msg1 %xmm1, %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xcc,0xd1]
+sha256msg1 %xmm1, %xmm2
+
+// CHECK: sha256msg1 (%rax), %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xcc,0x10]
+sha256msg1 (%rax), %xmm2
+
+// CHECK: sha256msg2 %xmm1, %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xcd,0xd1]
+sha256msg2 %xmm1, %xmm2
+
+// CHECK: sha256msg2 (%rax), %xmm2
+// CHECK:   encoding: [0x0f,0x38,0xcd,0x10]
+sha256msg2 (%rax), %xmm2
+
 // CHECK: movq  57005(,%riz), %rbx
 // CHECK: encoding: [0x48,0x8b,0x1c,0x25,0xad,0xde,0x00,0x00]
           movq  57005(,%riz), %rbx



--
~Craig
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