[llvm] r189669 - X86: Add a description of the Intel Atom Silvermont CPU.

Benjamin Kramer benny.kra at googlemail.com
Fri Aug 30 07:05:32 PDT 2013


Author: d0k
Date: Fri Aug 30 09:05:32 2013
New Revision: 189669

URL: http://llvm.org/viewvc/llvm-project?rev=189669&view=rev
Log:
X86: Add a description of the Intel Atom Silvermont CPU.

Currently this is just the atom model with SSE4.2 enabled.

Modified:
    llvm/trunk/lib/Support/Host.cpp
    llvm/trunk/lib/Target/X86/X86.td

Modified: llvm/trunk/lib/Support/Host.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=189669&r1=189668&r2=189669&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Host.cpp (original)
+++ llvm/trunk/lib/Support/Host.cpp Fri Aug 30 09:05:32 2013
@@ -265,6 +265,11 @@ std::string sys::getHostCPUName() {
       case 54: // 32 nm Atom Midview
         return "atom";
 
+      case 55: // Intel Atom Silvermont processors
+      case 74:
+      case 77:
+        return "slm";
+
       default: return (Em64T) ? "x86-64" : "i686";
       }
     case 15: {

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=189669&r1=189668&r2=189669&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Fri Aug 30 09:05:32 2013
@@ -206,6 +206,15 @@ def : ProcessorModel<"atom", AtomModel,
                       FeatureLEAUsesAG,
                       FeaturePadShortFunctions]>;
 
+// Silvermont.
+def : ProcessorModel<"slm", AtomModel,
+                     [ProcIntelAtom, FeatureSSE42, FeatureCMPXCHG16B,
+                      FeatureMOVBE, FeatureSlowBTMem, FeatureLeaForSP,
+                      FeatureSlowDivide,
+                      FeatureCallRegIndirect,
+                      FeatureLEAUsesAG,
+                      FeaturePadShortFunctions]>;
+
 // "Arrandale" along with corei3 and corei5
 def : ProcessorModel<"corei7", SandyBridgeModel,
                      [FeatureSSE42, FeatureCMPXCHG16B, FeatureSlowBTMem,





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