[llvm] r188911 - A minor change for an obvous problem caused by r188451:

mcrosier at codeaurora.org mcrosier at codeaurora.org
Wed Aug 21 10:57:41 PDT 2013


Hi Hal,
Would it make sense to add a test case in test/AArch64/neon-diagnostics.s
that checks to make sure that the immediate 63 doesn't report as an error?

 Chad

> Author: haoliu
> Date: Wed Aug 21 12:47:53 2013
> New Revision: 188911
>
> URL: http://llvm.org/viewvc/llvm-project?rev=188911&view=rev
> Log:
> A minor change for an obvous problem caused by r188451:
>         def imm0_63 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm
> < 63;}]>{
> As it seems Imm <63 should be Imm <= 63. ImmLeaf is used in pattern match,
> but there is already a function check the shift amount range, so just
> remove ImmLeaf. Also add a test to check 63.
>
> Modified:
>     llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td
>     llvm/trunk/test/CodeGen/AArch64/neon-shift.ll
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td?rev=188911&r1=188910&r2=188911&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td Wed Aug 21 12:47:53
> 2013
> @@ -1414,7 +1414,7 @@ def FMOVvi_2D : NeonI_FMOV_impl<".2d", V
>
>  // Vector Shift (Immediate)
>
> -def imm0_63 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 63;
> }]> {
> +def imm0_63 : Operand<i32> {
>    let ParserMatchClass = uimm6_asmoperand;
>  }
>
>
> Modified: llvm/trunk/test/CodeGen/AArch64/neon-shift.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/neon-shift.ll?rev=188911&r1=188910&r2=188911&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/neon-shift.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/neon-shift.ll Wed Aug 21 12:47:53 2013
> @@ -181,8 +181,8 @@ define <4 x i32> @test_shl_v4i32(<4 x i3
>
>  define <2 x i64> @test_shl_v2i64(<2 x i64> %a) {
>  ; CHECK: test_shl_v2i64:
> -; CHECK: shl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #3
> -  %tmp = shl <2 x i64> %a, <i64 3, i64 3>
> +; CHECK: shl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #63
> +  %tmp = shl <2 x i64> %a, <i64 63, i64 63>
>    ret <2 x i64> %tmp
>  }
>
>
>
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