[PATCH] Improve llvm-mc disassembly mode for testing

[Kristof Beyls]

Hi Tim,

Just wanted to say that I really like what this patch is aiming
to achieve. I hope it will also allow us to write much better tests
for instructions that are only defined in some versions or some
extensions of an architecture.

I'm afraid I'll have to leave the code reviewing to someone more 
knowledgeable in the llvm-mc source code, though.

I do have a comment on the naming of the files containing the test 
cases.
It seems that each file basically contains a number of tests that
are all run with the same llvm-mc command line. Therefore, I think
that the following renaming of the test files makes sense, and allows
consistent naming when test files will be added in the future with
a single run line. E.g.:
invalid-arm.txt         -> invalid-armv7.txt
invalid-thumb-xfail.txt -> invalid-thumbv7-xfail.txt
invalid-thumb.txt       -> invalid-thumbv7.txt
invalid-v8fp.txt        -> (maybe the test cases in this file should
                            be moved to a new section in 
                            invalid-armv7.txt)?

If later some tests were added e.g. to verify that Neon encodings 
are faulted when Neon isn't present the test file could be called 
invalid-armv7-noneon.txt. A similar naming scheme could be used for 
testing when other extensions are present/absent.

A minor detail I noticed is that the tests use different triples.
One uses -triple armv7; others use different variants of 
-triple armv7-apple-darwin. I'm wondering if it wouldn't be cleaner
to only specify architecture version in the triple and not specify
the other parts, since they shouldn't change any of the test results?

Thanks,

Kristof

> -----Original Message-----
> From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
> bounces at cs.uiuc.edu] On Behalf Of Tim Northover
> Sent: 18 July 2013 18:00
> To: t.p.northover at gmail.com
> Cc: llvm-commits at cs.uiuc.edu
> Subject: [PATCH] Improve llvm-mc disassembly mode for testing
> 
> Currently in disassembly mode llvm-mc tries to synchronise the
> instruction stream on the next byte when a failure occurs.
> 
> This is almost never what we actually want for testing particularly on
> fixed-width targets, where we have a "near miss" instruction in mind
> and want to start at the next such near miss when we've made sure that
> fails.
> 
> As a result invalid disassembly tests are a nightmare to write (one of
> the few still present uses of grep) and there are far fewer of them
> than there probably should be.
> 
> This patch modifies llvm-mc so that it accepts variations of its own
> "show-encoding" syntax as input.
> + Commas are accepted as byte separators (minor detail, but helps
> copy/paste)
> + A sequence of bytes enclosed in "[" and "]" will be processed by the
> disassembler atomically.
> 
> This means that if a failure occurs within a [...] pair then llvm-mc
> will resynchronise predictably once it has finished.
> 
> I've also changed the ARM tests to match (as a starting point, mostly
> to test the new feature and illustrate what the new regime can do).
> 
> http://llvm-reviews.chandlerc.com/D1177
> 
> Files:
>   test/MC/Disassembler/ARM/invalid-BFI-arm.txt
>   test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
>   test/MC/Disassembler/ARM/invalid-CPS-arm.txt
>   test/MC/Disassembler/ARM/invalid-CPS2p-arm.txt
>   test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt
>   test/MC/Disassembler/ARM/invalid-IT-CBNZ-thumb.txt
>   test/MC/Disassembler/ARM/invalid-IT-thumb.txt
>   test/MC/Disassembler/ARM/invalid-LDC-form-arm.txt
>   test/MC/Disassembler/ARM/invalid-LDM-thumb.txt
>   test/MC/Disassembler/ARM/invalid-LDR-thumb.txt
>   test/MC/Disassembler/ARM/invalid-LDRB_POST-arm.txt
>   test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt
>   test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt
>   test/MC/Disassembler/ARM/invalid-LDR_PRE-arm.txt
>   test/MC/Disassembler/ARM/invalid-LDRrs-arm.txt
>   test/MC/Disassembler/ARM/invalid-MCR-arm.txt
>   test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt
>   test/MC/Disassembler/ARM/invalid-MOVr-arm.txt
>   test/MC/Disassembler/ARM/invalid-MOVs-arm.txt
>   test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt
>   test/MC/Disassembler/ARM/invalid-MSRi-arm.txt
>   test/MC/Disassembler/ARM/invalid-NEON-thumb.txt
>   test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt
>   test/MC/Disassembler/ARM/invalid-SBFX-arm.txt
>   test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
>   test/MC/Disassembler/ARM/invalid-SRS-arm.txt
>   test/MC/Disassembler/ARM/invalid-STMIA_UPD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-STR-thumb.txt
>   test/MC/Disassembler/ARM/invalid-SXTB-arm.txt
>   test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt
>   test/MC/Disassembler/ARM/invalid-VCVT-arm.txt
>   test/MC/Disassembler/ARM/invalid-VEXTd-arm.txt
>   test/MC/Disassembler/ARM/invalid-VFP-thumb.txt
>   test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt
>   test/MC/Disassembler/ARM/invalid-VLD1LNd32_UPD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-VLD4LNd32_UPD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-VLDMSDB_UPD-arm.txt
>   test/MC/Disassembler/ARM/invalid-VLDST-arm.txt
>   test/MC/Disassembler/ARM/invalid-VMOV-arm.txt
>   test/MC/Disassembler/ARM/invalid-VQADD-arm.txt
>   test/MC/Disassembler/ARM/invalid-VST1LNd32_UPD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt
>   test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt
>   test/MC/Disassembler/ARM/invalid-VST4LNd32_UPD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-arm.txt
>   test/MC/Disassembler/ARM/invalid-hint-arm.txt
>   test/MC/Disassembler/ARM/invalid-hint-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2LDRBT-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2LDREXD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2LDRSHi12-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2LDRSHi8-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2PUSH-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2STRD_PRE-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2STREXB-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2STREXD-thumb.txt
>   test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt
>   test/MC/Disassembler/ARM/invalid-thumb-xfail.txt
>   test/MC/Disassembler/ARM/invalid-thumb.txt
>   test/MC/Disassembler/ARM/invalid-v8fp.txt
>   tools/llvm-mc/Disassembler.cpp