[PATCH] X86: fold SSE2/AVX2 logical shift by immediate amout into zero vector when possible

[Nadav Rotem]

On Jul 11, 2013, at 5:35 AM, Andrea_DiBiagio at sn.scee.net wrote:
>> 
> 
> I considered this case, but I decided that it was probably best to not 
> introduce unnecessary complexity into a target specific optimization when, 
> as Duncan says, this case is already covered by the IR optimizer.
> 

These vectors with these constants can be generated during legalization.  But it’s not a big deal and we can do without it.  


> 
> The behavior of shifts by amount larger than the element size is defined 
> for x86 SSE2/AVX2.


Yes, but we are looking at the semantics of the llvm SelectionDAG, and we want to lower it to x86.  :)

In any case, this is correct and I don’t see any reason not to commit the patch as is. 

> In my opinion this is not a missed opportunity since we don't know about 
> the sign bit of variable %InVec and therefore it is not safe to fold the 
> arithmetic shift into a vector of all 0s.
> 

Yes, you are correct. I missed the fact that this is an *arithmetic* shift. 

Thanks,
Nadav
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