[llvm] r184820 - R600/SI: Add support for v4i32 and v4f32 kernel args

[Tom Stellard]

Author: tstellar
Date: Mon Jun 24 21:39:25 2013
New Revision: 184820

URL: http://llvm.org/viewvc/llvm-project?rev=184820&view=rev
Log:
R600/SI: Add support for v4i32 and v4f32 kernel args

Tested-By: Aaron Watry <awatry at gmail.com>

Modified:
    llvm/trunk/lib/Target/R600/AMDGPUCallingConv.td
    llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll

Modified: llvm/trunk/lib/Target/R600/AMDGPUCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUCallingConv.td?rev=184820&r1=184819&r2=184820&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUCallingConv.td (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUCallingConv.td Mon Jun 24 21:39:25 2013
@@ -38,10 +38,11 @@ def CC_SI : CallingConv<[
 
 // Calling convention for SI compute kernels
 def CC_SI_Kernel : CallingConv<[
-  CCIfType<[i64],      CCAssignToStack <8, 4>>,
-  CCIfType<[i32, f32], CCAssignToStack <4, 4>>,
-  CCIfType<[i16],      CCAssignToStack <2, 4>>,
-  CCIfType<[i8],       CCAssignToStack <1, 4>>
+  CCIfType<[v4i32, v4f32], CCAssignToStack <16, 4>>,
+  CCIfType<[i64],          CCAssignToStack < 8, 4>>,
+  CCIfType<[i32, f32],     CCAssignToStack < 4, 4>>,
+  CCIfType<[i16],          CCAssignToStack < 2, 4>>,
+  CCIfType<[i8],           CCAssignToStack < 1, 4>>
 ]>;
 
 def CC_AMDGPU : CallingConv<[

Modified: llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll?rev=184820&r1=184819&r2=184820&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll (original)
+++ llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll Mon Jun 24 21:39:25 2013
@@ -1,16 +1,20 @@
-;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
-
-; CHECK: @v4i32_kernel_arg
-; CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 40
+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
+; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
 
+; R600-CHECK: @v4i32_kernel_arg
+; R600-CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 40
+; SI-CHECK: @v4i32_kernel_arg
+; SI-CHECK: BUFFER_STORE_DWORDX4
 define void @v4i32_kernel_arg(<4 x i32> addrspace(1)* %out, <4 x i32>  %in) {
 entry:
   store <4 x i32> %in, <4 x i32> addrspace(1)* %out
   ret void
 }
 
-; CHECK: @v4f32_kernel_arg
-; CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 40
+; R600-CHECK: @v4f32_kernel_arg
+; R600-CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 40
+; SI-CHECK: @v4f32_kernel_arg
+; SI-CHECK: BUFFER_STORE_DWORDX4
 define void @v4f32_kernel_args(<4 x float> addrspace(1)* %out, <4 x float>  %in) {
 entry:
   store <4 x float> %in, <4 x float> addrspace(1)* %out