[LLVMdev] Problems with 64-bit register operands of inline asm on ARM

[Renato Golin]

On 22 June 2013 01:19, Weiming Zhao <weimingz at codeaurora.org> wrote:

> The syntax of %0 is not changed.
> When %0 is encountered, the first reg of GPRPair will be emitted.
> GAS accepts ASM like "ldrd r0, [r4]" , but we won't replace "%0" with "r0,
> r1"
>

So, this patch will fix one side but not all. I think that's perfectly
fine. Can you add a FIXME to that effect on the appropriate place in the
code?

How often does the %0 pattern appear in real code? Will your patch make it
easier/harder to implement the %0 syntax?

cheers,
--renato
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