[llvm] r184445 - This reverts r155000.

[Joey Gouly]

Author: joey
Date: Thu Jun 20 12:42:36 2013
New Revision: 184445

URL: http://llvm.org/viewvc/llvm-project?rev=184445&view=rev
Log:
This reverts r155000.
The cdp2 instruction should have the same restrictions as cdp on the
co-processor registers.

VFP instructions on v8/AArch32 share the same encoding space as cdp2.

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/test/MC/ARM/basic-arm-instructions.s
    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=184445&r1=184444&r2=184445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Jun 20 12:42:36 2013
@@ -1007,11 +1007,6 @@ def p_imm : Operand<i32> {
   let DecoderMethod = "DecodeCoprocessor";
 }
 
-def pf_imm : Operand<i32> {
-  let PrintMethod = "printPImmediate";
-  let ParserMatchClass = CoprocNumAsmOperand;
-}
-
 def CoprocRegAsmOperand : AsmOperandClass {
   let Name = "CoprocReg";
   let ParserMethod = "parseCoprocRegOperand";
@@ -4447,7 +4442,7 @@ def CDP : ABI<0b1110, (outs), (ins p_imm
   let Inst{23-20} = opc1;
 }
 
-def CDP2 : ABXI<0b1110, (outs), (ins pf_imm:$cop, imm0_15:$opc1,
+def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
                c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
                NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
                [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,

Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=184445&r1=184444&r2=184445&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Thu Jun 20 12:42:36 2013
@@ -459,9 +459,11 @@ Lforward:
 @------------------------------------------------------------------------------
         cdp  p7, #1, c1, c1, c1, #4
         cdp2  p7, #1, c1, c1, c1, #4
+        cdp2   p10, #0, c6, c12, c0, #7
 
 @ CHECK: cdp  p7, #1, c1, c1, c1, #4     @ encoding: [0x81,0x17,0x11,0xee]
 @ CHECK: cdp2  p7, #1, c1, c1, c1, #4    @ encoding: [0x81,0x17,0x11,0xfe]
+@ CHECK: cdp2  p10, #0, c6, c12, c0, #7   @ encoding: [0xe0,0x6a,0x0c,0xfe]
 
 
 @------------------------------------------------------------------------------

Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=184445&r1=184444&r2=184445&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Thu Jun 20 12:42:36 2013
@@ -362,7 +362,3 @@
 
 # CHECK: ldmgt	sp!, {r9}
 0x00 0x02 0xbd 0xc8
-
-# CHECK: cdp2	p10, #0, c6, c12, c0, #7
-0xe0 0x6a 0x0c 0xfe
-

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt?rev=184445&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt Thu Jun 20 12:42:36 2013
@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=arm 2>&1 | FileCheck %s
+
+# CHECK: invalid instruction encoding
+0xe0 0x6a 0x0c 0xfe