[llvm] r184222 - During SelectionDAG building explicitly set a node to constant zero when the

[Duncan Sands]

On 20/06/13 18:46, Quentin Colombet wrote:
> On Jun 20, 2013, at 9:21 AM, Quentin Colombet <qcolombet at apple.com
> <mailto:qcolombet at apple.com>> wrote:
>
>>
>> On Jun 20, 2013, at 5:14 AM, Duncan Sands <duncan.sands at gmail.com
>> <mailto:duncan.sands at gmail.com>> wrote:
>>
>>> Hi Quentin,
>>>
>>> On 18/06/13 22:14, Quentin Colombet wrote:
>>>> Author: qcolombet
>>>> Date: Tue Jun 18 15:14:39 2013
>>>> New Revision: 184222
>>>>
>>>> URL:http://llvm.org/viewvc/llvm-project?rev=184222&view=rev
>>>> Log:
>>>> During SelectionDAG building explicitly set a node to constant zero when the
>>>> value is zero.
>>>
>>> you could also set it explicitly to -1 when all bits are sign bits.
>> Yes, you are right.
> No, in fact, this is not true.
> The sign bits can be all zeros. We do not know statically.

Yes, you are right of course, sorry for the noise.

Best wishes, Duncan.