[llvm] r184021 - R600: Add SI load support for v[24]i32 and store for v2i32

Tom Stellard thomas.stellard at amd.com
Fri Jun 14 17:09:31 PDT 2013


Author: tstellar
Date: Fri Jun 14 19:09:31 2013
New Revision: 184021

URL: http://llvm.org/viewvc/llvm-project?rev=184021&view=rev
Log:
R600: Add SI load support for v[24]i32 and store for v2i32

Also add a seperate vector lit test file, since r600 doesn't seem to handle
v2i32 load/store yet, but we can test both for SI.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Aaron Watry <awatry at gmail.com>

Added:
    llvm/trunk/test/CodeGen/R600/load.vec.ll
Modified:
    llvm/trunk/lib/Target/R600/SIInstructions.td

Modified: llvm/trunk/lib/Target/R600/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstructions.td?rev=184021&r1=184020&r2=184021&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstructions.td Fri Jun 14 19:09:31 2013
@@ -1638,6 +1638,10 @@ defm : MUBUFLoad_Pattern <BUFFER_LOAD_DW
                           global_load, constant_load>;
 defm : MUBUFLoad_Pattern <BUFFER_LOAD_UBYTE_ADDR64, i32,
                           zextloadi8_global, zextloadi8_constant>;
+defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX2_ADDR64, v2i32,
+                          global_load, constant_load>;
+defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX4_ADDR64, v4i32,
+                          global_load, constant_load>;
 
 multiclass MUBUFStore_Pattern <MUBUF Instr, ValueType vt> {
 
@@ -1654,6 +1658,7 @@ multiclass MUBUFStore_Pattern <MUBUF Ins
 
 defm : MUBUFStore_Pattern <BUFFER_STORE_DWORD, i32>;
 defm : MUBUFStore_Pattern <BUFFER_STORE_DWORDX2, i64>;
+defm : MUBUFStore_Pattern <BUFFER_STORE_DWORDX2, v2i32>;
 defm : MUBUFStore_Pattern <BUFFER_STORE_DWORDX4, v4i32>;
 
 /********** ====================== **********/

Added: llvm/trunk/test/CodeGen/R600/load.vec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/load.vec.ll?rev=184021&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/load.vec.ll (added)
+++ llvm/trunk/test/CodeGen/R600/load.vec.ll Fri Jun 14 19:09:31 2013
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK  %s
+
+; load a v2i32 value from the global address space.
+; SI-CHECK: @load_v2i32
+; SI-CHECK: BUFFER_LOAD_DWORDX2 VGPR{{[0-9]+}}
+define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
+  %a = load <2 x i32> addrspace(1) * %in
+  store <2 x i32> %a, <2 x i32> addrspace(1)* %out
+  ret void
+}
+
+; load a v4i32 value from the global address space.
+; SI-CHECK: @load_v4i32
+; SI-CHECK: BUFFER_LOAD_DWORDX4 VGPR{{[0-9]+}}
+define void @load_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
+  %a = load <4 x i32> addrspace(1) * %in
+  store <4 x i32> %a, <4 x i32> addrspace(1)* %out
+  ret void
+}





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