[PATCH, 3.3 docs] Add PowerPC release notes

[Bill Schmidt]

Release notes for PowerPC changes in LLVM 3.3.  Is this ok for
RELEASE_33/rc3?

Thanks,
Bill


Index: rc3/docs/ReleaseNotes.rst
===================================================================
--- rc3/docs/ReleaseNotes.rst	(revision 183398)
+++ rc3/docs/ReleaseNotes.rst	(working copy)
@@ -103,6 +103,30 @@ Hexagon Target
   architectures which are no longer in use. Currently supported
   architectures are hexagonv4 and hexagonv5.
 
+PowerPC Target
+--------------
+
+New features and improvements:
+
+- PowerPC now supports an assembly parser.
+- Support added for thread-local storage.  64-bit ELF subtarget only.
+- Support added for medium and large code model (-mcmodel=medium,large).
+  Medium code model is now the default.  64-bit ELF subtarget only.
+- Improved register allocation (fewer reserved registers).
+- 64-bit atomic load and store are now supported.
+- Improved code generation for unaligned memory accesses of scalar types.
+- Improved performance of floating-point divide and square root
+  with -ffast-math.
+- Support for predicated returns.
+- Improved code generation for comparisons.
+- Support added for inline setjmp and longjmp.
+- Support added for many instructions introduced in PowerISA 2.04, 2.05,
+  and 2.06.
+- Improved spill code for vector registers.
+- Support added for -mno-altivec.
+- ABI compatibility fixes for complex parameters, 128-bit integer parameters,
+  and varargs functions.  64-bit ELF subtarget only.
+  
 Loop Vectorizer
 ---------------