[llvm] r183132 - R600/SI: Fixup CopyToReg register class in PostprocessISelDAG()

[Rafael Ávila De Espíndola]

Test case ?

Sent from my iPhone

On 2013-06-03, at 13:39, Tom Stellard <thomas.stellard at amd.com> wrote:

> Author: tstellar
> Date: Mon Jun  3 12:39:46 2013
> New Revision: 183132
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=183132&view=rev
> Log:
> R600/SI: Fixup CopyToReg register class in PostprocessISelDAG()
> 
> The CopyToReg nodes will sometimes try to copy a value from a VGPR to an
> SGPR.  This kind of copy is not possible, so we need to detect
> VGPR->SGPR copies and do something else.  The current strategy is to
> replace these copies with VGPR->VGPR copies and hope that all the users
> of CopyToReg can accept VGPRs as arguments.
> 
> Modified:
>    llvm/trunk/lib/Target/R600/AMDILISelDAGToDAG.cpp
> 
> Modified: llvm/trunk/lib/Target/R600/AMDILISelDAGToDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDILISelDAGToDAG.cpp?rev=183132&r1=183131&r2=183132&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/AMDILISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/R600/AMDILISelDAGToDAG.cpp Mon Jun  3 12:39:46 2013
> @@ -18,6 +18,7 @@
> #include "R600InstrInfo.h"
> #include "SIISelLowering.h"
> #include "llvm/ADT/ValueMap.h"
> +#include "llvm/CodeGen/MachineRegisterInfo.h"
> #include "llvm/CodeGen/PseudoSourceValue.h"
> #include "llvm/CodeGen/SelectionDAG.h"
> #include "llvm/CodeGen/SelectionDAGISel.h"
> @@ -649,18 +650,45 @@ bool AMDGPUDAGToDAGISel::SelectADDRIndir
> 
> void AMDGPUDAGToDAGISel::PostprocessISelDAG() {
> 
> +  if (Subtarget.device()->getGeneration() < AMDGPUDeviceInfo::HD7XXX) {
> +    return;
> +  }
> +
>   // Go over all selected nodes and try to fold them a bit more
>   const AMDGPUTargetLowering& Lowering = ((const AMDGPUTargetLowering&)TLI);
>   for (SelectionDAG::allnodes_iterator I = CurDAG->allnodes_begin(),
>        E = CurDAG->allnodes_end(); I != E; ++I) {
> 
> -    MachineSDNode *Node = dyn_cast<MachineSDNode>(I);
> -    if (!Node)
> +    SDNode *Node = I;
> +    switch (Node->getOpcode()) {
> +    // Fix the register class in copy to CopyToReg nodes - ISel will always
> +    // use SReg classes for 64-bit copies, but this is not always what we want.
> +    case ISD::CopyToReg: {
> +      unsigned Reg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
> +      SDValue Val = Node->getOperand(2);
> +      const TargetRegisterClass *RC = RegInfo->getRegClass(Reg);
> +      if (RC != &AMDGPU::SReg_64RegClass) {
> +        continue;
> +      }
> +
> +      if (!Val.getNode()->isMachineOpcode()) {
> +        continue;
> +      }
> +
> +      const MCInstrDesc Desc = TM.getInstrInfo()->get(Val.getNode()->getMachineOpcode());
> +      const TargetRegisterInfo *TRI = TM.getRegisterInfo();
> +      RegInfo->setRegClass(Reg, TRI->getRegClass(Desc.OpInfo[0].RegClass));
> +      continue;
> +    }
> +    }
> +
> +    MachineSDNode *MachineNode = dyn_cast<MachineSDNode>(I);
> +    if (!MachineNode)
>       continue;
> 
> -    SDNode *ResNode = Lowering.PostISelFolding(Node, *CurDAG);
> -    if (ResNode != Node)
> +    SDNode *ResNode = Lowering.PostISelFolding(MachineNode, *CurDAG);
> +    if (ResNode != Node) {
>       ReplaceUses(Node, ResNode);
> +    }
>   }
> }
> -
> 
> 
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