[PATCH] Tidy some register classes for ARM and Thumb

[JF Bastien]

Tidy up three places where the register class for ARM and Thumb wasn't
restrictive enough:
 - No PC dest for reg-reg add/orr/sub.
 - No PC dest for shifts.
 - No PC or SP for Thumb2 reg-imm add.

I encountered this while combining FastISel with -verify-machineinstrs.
These instructions defined registers whose classes weren't restrictive
enough, and the uses failed verification. They're also undefined in the
ISA, or would produce code that FastISel wouldn't want. This doesn't fix
the register class narrowing issue (where uses should restrict
definitions), and isn't thorough, but it's a small step in the right
direction.
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