patch: make instcombine remove shuffles by reordering vector elements

Hal Finkel hfinkel at anl.gov
Sun May 5 19:50:46 PDT 2013


----- Original Message -----
> From: "Owen Anderson" <resistor at mac.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "Duncan Sands" <duncan.sands at gmail.com>, llvm-commits at cs.uiuc.edu
> Sent: Sunday, May 5, 2013 9:34:17 PM
> Subject: Re: patch: make instcombine remove shuffles by reordering vector elements
> 
> 
> 
> 
> On May 5, 2013, at 6:53 AM, Hal Finkel < hfinkel at anl.gov > wrote:
> 
> 
> On PPC, however, the situation seems slightly more friendly than on
> x86 because we still do have a general-purpose permutation
> instruction, it is just faster (and lowers register pressure) to use
> an alternative sequence.
> 
> ARM NEON has a general shuffle instruction as well (vtbl). The
> problem is that we quite often encounter user code that was written
> with a specific shuffle-like instruction in mind. If we munge that
> shuffle too much, it's quite possible that we'll fail to lower it
> back to a decent sequence, in which case we've pessimized what the
> user wrote.

Interesting. Would it make sense to store some kind of shuffle-sequence metadata which keeps track of the original formulation of each shuffle? This could be used by InstCombine, CSE, etc. and by the backends (so that if it does not like the current formulation, it can fall back on something related to the original method of expression).

Alternatively, we could use TTI so that only inexpensive shuffles are formed by these optimizations.

Thanks again,
Hal

> 
> 
> --Owen



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