[PATCH] Fix encoding description for ARM post-indexed ldr instructions

Eric Christopher echristo at gmail.com
Mon Apr 29 05:42:22 PDT 2013


*pokes Jim*

Jim?

-eric

On Mon, Apr 29, 2013 at 11:39 AM, Mihail Popa <mihail.popa at gmail.com> wrote:
> Guys, may I commit this?
>
> The absence of this additional constraint triggers an unfortunate behaviour
> in the disassembler. For example:
>
> echo "0xb0 0x00 0x10 0xe6" | llvm-mc -disassemble -show-inst -triple=armv7
> -show-encoding
>
> ldr r0, [r0], -r0, lsr #1   @ encoding: [0xa0,0x00,0x10,0xe6]
>                                         @ <MCInst #205 LDR_POST_REG
>                                         @  <MCOperand Reg:60>
>                                         @  <MCOperand Reg:60>
>                                         @  <MCOperand Reg:60>
>                                         @  <MCOperand Reg:60>
>                                         @  <MCOperand Imm:159745>
>                                         @  <MCOperand Imm:14>
>                                         @  <MCOperand Reg:0>>
>
> Note the input and output encodings differ! This is because the input
> encoding is actually undefined but accepted as a LDR.
> We don't want that in a disassembler. I can also produce about 15 million
> additional similar failures due to this oversight alone!
>
> Thanks,
> Mihai
>
>
>
> On Fri, Apr 26, 2013 at 5:59 PM, Owen Anderson <resistor at mac.com> wrote:
>>
>> It looks OK to me offhand, but I have no memory of why the test was
>> XFAIL'd initially.
>>
>> --Owen
>>
>> On Apr 26, 2013, at 8:54 AM, Rafael EspĂ­ndola <rafael.espindola at gmail.com>
>> wrote:
>>
>> > Owen, this patch looks good to me, but it has been disabled since the
>> > switch to the new arm disassembler. Would you mind double checking
>> > that it is the correct fix?
>> >
>> > On 26 April 2013 11:46, Mihail Popa <mihail.popa at arm.com> wrote:
>> >> Hello.
>> >>
>> >> This tightens up the encoding description for ARM post-indexed ldr
>> >> instructions. All instructions in this class have bit 4 cleared. It
>> >> turns
>> >> out that there is a test case for this, but it was marked XFAIL.
>> >>
>> >> Regards,
>> >> Mihai
>> >>
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>>
>>
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>
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