[llvm] r180254 - Fix constant folding for one lane vector types. Constant folding one lane vector types not returns a vector instead of a scalar.

[Silviu Baranga]

Author: sbaranga
Date: Thu Apr 25 04:32:33 2013
New Revision: 180254

URL: http://llvm.org/viewvc/llvm-project?rev=180254&view=rev
Log:
Fix constant folding for one lane vector types. Constant folding one lane vector types not returns a vector instead of a scalar.

Added:
    llvm/trunk/test/CodeGen/ARM/v1-constant-fold.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=180254&r1=180253&r2=180254&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Apr 25 04:32:33 2013
@@ -2785,7 +2785,7 @@ SDValue SelectionDAG::FoldConstantArithm
   }
 
   // Handle the scalar case first.
-  if (Outputs.size() == 1)
+  if (Scalar1 && Scalar2)
     return Outputs.back();
 
   // Otherwise build a big vector out of the scalar elements we generated.

Added: llvm/trunk/test/CodeGen/ARM/v1-constant-fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/v1-constant-fold.ll?rev=180254&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/v1-constant-fold.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/v1-constant-fold.ll Thu Apr 25 04:32:33 2013
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+v7,+vfp3,-neon  | FileCheck %s
+
+; PR15611. Check that we don't crash when constant folding v1i32 types.
+
+; CHECK: foo:
+define void @foo(i32 %arg) {
+bb:
+  %tmp = insertelement <4 x i32> undef, i32 %arg, i32 0
+  %tmp1 = insertelement <4 x i32> %tmp, i32 0, i32 1
+  %tmp2 = insertelement <4 x i32> %tmp1, i32 0, i32 2
+  %tmp3 = insertelement <4 x i32> %tmp2, i32 0, i32 3
+  %tmp4 = add <4 x i32> %tmp3, <i32 -1, i32 -1, i32 -1, i32 -1>
+; CHECK:  bl bar
+  tail call void @bar(<4 x i32> %tmp4)
+  ret void
+}
+
+declare void @bar(<4 x i32>)