[llvm] r179593 - Fix build failure introduced in 179591 when assertions are disabled.

[Logan Chien]

Author: logan
Date: Tue Apr 16 09:02:30 2013
New Revision: 179593

URL: http://llvm.org/viewvc/llvm-project?rev=179593&view=rev
Log:
Fix build failure introduced in 179591 when assertions are disabled.

Modified:
    llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp?rev=179593&r1=179592&r2=179593&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp Tue Apr 16 09:02:30 2013
@@ -428,7 +428,9 @@ void ARMELFStreamer::EmitSetFP(unsigned
   const MCRegisterInfo &MRI = getContext().getRegisterInfo();
 
   uint16_t NewFPRegEncVal = MRI.getEncodingValue(NewFPReg);
+#ifndef NDEBUG
   uint16_t NewSPRegEncVal = MRI.getEncodingValue(NewSPReg);
+#endif
 
   assert((NewSPReg == ARM::SP || NewSPRegEncVal == FPReg) &&
          "the operand of .setfp directive should be either $sp or $fp");
@@ -446,7 +448,9 @@ void ARMELFStreamer::EmitRegSave(const S
                                  bool IsVector) {
   const MCRegisterInfo &MRI = getContext().getRegisterInfo();
 
+#ifndef NDEBUG
   unsigned Max = IsVector ? 32 : 16;
+#endif
   uint32_t &RegMask = IsVector ? VFPRegSave : RegSave;
 
   for (size_t i = 0; i < RegList.size(); ++i) {