[PATCH v3] R600/SI: Add pattern for AMDGPUurecip

[Christian König]

Am 10.04.2013 18:50, schrieb Tom Stellard:
> On Wed, Apr 10, 2013 at 05:59:48PM +0200, Michel Dänzer wrote:
>> [SNIP]
> We should start using the updated pattern syntax for all new patterns.
> This means replacing register classes with types for the input patterns
> and omitting the type in the output pattern:
>
> def : Pat <
>    (AMDGPUurecip i32:$src0),
>    (V_CVT_U32_F32_e32
>      (V_MUL_F32_e32 CONST.FP_UINT_MAX_PLUS_1,
>                     (V_RCP_IFLAG_F32_e32 (V_CVT_F32_U32_e32 $src0))))
>
> With that change:
>
> Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

BTW: I created the attached patches two weeks ago. They rework most of 
the existing patterns on SI to use the new format, but I currently don't 
have time to rebase, test & commit them. They shouldn't change anything 
in functionality, so if you guys think they are ok then please review 
and commit them.

Thanks,
Christian.
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