[llvm] r177731 - Remove the xaddroff ComplexPattern.

Rafael Ávila De Espíndola rafael.espindola at gmail.com
Sun Mar 24 10:41:54 PDT 2013


Is this testable?

Sent from my iPhone

On 2013-03-22, at 10:57, Ulrich Weigand <ulrich.weigand at de.ibm.com> wrote:

> Author: uweigand
> Date: Fri Mar 22 09:57:48 2013
> New Revision: 177731
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=177731&view=rev
> Log:
> Remove the xaddroff ComplexPattern.
> 
> The xaddroff pattern is currently (mistakenly) used to recognize
> the *base* register in pre-inc store patterns.  This patch replaces
> those uses by ptr_rc_nor0 (as is elsewhere done to match the base
> register of an address), and removes the now unused ComplexPattern.
> 
> 
> Modified:
>    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
>    llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
>    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
> 
> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=177731&r1=177730&r2=177731&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Fri Mar 22 09:57:48 2013
> @@ -132,18 +132,6 @@ namespace {
>       return false;
>     }
> 
> -    /// SelectAddrIdxOffs - Return true if the operand is valid for a preinc
> -    /// index field.  Because preinc imms have already been validated, just
> -    /// accept it.
> -    bool SelectAddrIdxOffs(SDValue N, SDValue &Out) const {
> -      if (isa<ConstantSDNode>(N) || N.getOpcode() == PPCISD::Lo ||
> -          N.getOpcode() == ISD::TargetGlobalAddress)
> -        return false;
> -
> -      Out = N;
> -      return true;
> -    }
> -
>     /// SelectAddrIdx - Given the specified addressed, check to see if it can be
>     /// represented as an indexed [r+r] operation.  Returns false if it can
>     /// be represented by [r+imm], which are preferred.
> 
> Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=177731&r1=177730&r2=177731&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Fri Mar 22 09:57:48 2013
> @@ -875,14 +875,14 @@ def : Pat<(pre_truncsti32 G8RC:$rS, ptr_
> def : Pat<(aligned4pre_store G8RC:$rS, ptr_rc_nor0:$ptrreg, iaddroff:$ptroff),
>           (STDU G8RC:$rS, iaddroff:$ptroff, ptr_rc_nor0:$ptrreg)>;
> 
> -def : Pat<(pre_truncsti8 G8RC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STBUX8 G8RC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> -def : Pat<(pre_truncsti16 G8RC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STHUX8 G8RC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> -def : Pat<(pre_truncsti32 G8RC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STWUX8 G8RC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> -def : Pat<(pre_store G8RC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STDUX G8RC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_truncsti8 G8RC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STBUX8 G8RC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_truncsti16 G8RC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STHUX8 G8RC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_truncsti32 G8RC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STWUX8 G8RC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_store G8RC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STDUX G8RC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> 
> 
> //===----------------------------------------------------------------------===//
> 
> Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=177731&r1=177730&r2=177731&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Fri Mar 22 09:57:48 2013
> @@ -424,7 +424,6 @@ def addr   : ComplexPattern<iPTR, 1, "Se
> 
> /// This is just the offset part of iaddr, used for preinc.
> def iaddroff : ComplexPattern<iPTR, 1, "SelectAddrImmOffs", [], []>;
> -def xaddroff : ComplexPattern<iPTR, 1, "SelectAddrIdxOffs", [], []>;
> 
> //===----------------------------------------------------------------------===//
> // PowerPC Instruction Predicate Definitions.
> @@ -1005,16 +1004,16 @@ def STFDUX: XForm_8<31, 759, (outs ptr_r
> // Patterns to match the pre-inc stores.  We can't put the patterns on
> // the instruction definitions directly as ISel wants the address base
> // and offset to be separate operands, not a single complex operand.
> -def : Pat<(pre_truncsti8 GPRC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STBUX GPRC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> -def : Pat<(pre_truncsti16 GPRC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STHUX GPRC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> -def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STWUX GPRC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> -def : Pat<(pre_store F4RC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STFSUX F4RC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> -def : Pat<(pre_store F8RC:$rS, ptr_rc:$ptrreg, xaddroff:$ptroff),
> -          (STFDUX F8RC:$rS, xaddroff:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_truncsti8 GPRC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STBUX GPRC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_truncsti16 GPRC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STHUX GPRC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STWUX GPRC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_store F4RC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STFSUX F4RC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> +def : Pat<(pre_store F8RC:$rS, ptr_rc:$ptrreg, ptr_rc_nor0:$ptroff),
> +          (STFDUX F8RC:$rS, ptr_rc_nor0:$ptroff, ptr_rc:$ptrreg)>;
> 
> def SYNC : XForm_24_sync<31, 598, (outs), (ins),
>                         "sync", LdStSync,
> 
> 
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