[PATCH] PEI scavengeFrameVirtualRegs and RS improvments

Hal Finkel hfinkel at anl.gov
Sat Mar 23 22:50:27 PDT 2013


Jakob, et al.,

In attempting to upgrade the PowerPC backend to use PEI's scavengeFrameVirtualRegs along with RS's new ability to deliver more than one simultaneous register, I discovered that scavengeFrameVirtualRegs was not really setup to support this mode of operation. In fact, it was not even setup to support instructions which both defined and used virtual registers. The attached patch seems to fix these problems.

Some details:

The existing code supports only one vreg -> physreg mapping at a time, and as it processes the instruction operands in order, it will find the definition of the new virtual register prior to the use of the existing mapping. While this problem can be fixed by scanning the operands in reverse order, that would not help the case where we really have multiple virtual registers that should be simultaneously live. To fix this, I removed the code which maintained the explicit single mapping, and instead call replaceRegWith as soon as the register mapping is established (meaning that RS has scavenged a register). In some sense this changes how the virtual frame scavenging could work: currently a single virtual register, with multiple definitions (non-SSA), could be reused in several places, and scavengeFrameVirtualRegs will happily scavenge a new physical register for each definition. As far as I can tell, only PPC and ARM are using virtual frame scavenging, and neither of those backends use the functionality in this way.

Unfortunately, once the above problem is solved, a code-quality problem surfaces: the RS would never return a register killed by some instruction when asked to scavenge a register at that instruction. This would lead to more use of the spill slots than necessary. To fix this issue I've done two things:

 1. In scavengeFrameVirtualRegs, RS->forward is called prior to processing the instruction. This makes sure that killed registers are marked as unused. forward() needed some small updates to ignore the virtual registers.

 2. Normally, scavengeRegister will remove from consideration all registers referenced by the instruction pointed to by the iterator. I've added a boolean parameter to disable this behavior for killed registers (this cannot be made the default behavior because some code inserts code that uses the scavenged register prior to the provided iterator).

With these changes, virtual frame scavenging now seems to work properly, even with multiple simultaneous virtual registers.

Please review.

Thanks again,
Hal

-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory
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